Oblique-Directional Plasma Etching of Si Using a Faraday Cage

2009 ◽  
Vol 156 (7) ◽  
pp. D222 ◽  
Author(s):  
Jin-Kwan Lee ◽  
Seung-Haeng Lee ◽  
Jae-Ho Min ◽  
Il-Yong Jang ◽  
Chang-Koo Kim ◽  
...  
Keyword(s):  
Plasma Etching ◽  
Faraday Cage

More vertical etch profile using a Faraday cage in plasma etching

1999 ◽  
Vol 70 (5) ◽  
pp. 2458-2461 ◽  
Author(s):  
Byeong-Ok Cho ◽  
Sung-Wook Hwang ◽  
Jung-Hyun Ryu ◽  
Sang Heup Moon
Keyword(s):  
Plasma Etching ◽  
Faraday Cage ◽  
Etch Profile

Quantitation in thin Sections Within the Electron Microscope

1976 ◽  
Vol 34 ◽  
pp. 336-337
Author(s):  
J. Edie
Keyword(s):  
Electron Beam ◽  
Electron Microscope ◽  
Electron Scattering ◽  
Volume Density ◽  
Thin Sections ◽  
Faraday Cage ◽  
Local Mass ◽  
Physical Measurements ◽  
Mass Volume ◽  
Varying Mass

In TEM image formation, the observed contrast variations within thin sections result from differential electron scattering within microregions of varying mass thickness. It is possible to utilize these electron scattering properties to obtain objective information regarding various specimen parameters (1, 2, 3).A pragmatic, empirical approach is described which enables a microscopist to perform physical measurements of thickness of thin sections and estimates of local mass, volume, density and, possibly, molecular configurations within thin sections directly in the microscope. A Faraday cage monitors the transmitted electron beam and permits measurements of electron beam intensities.

Interferometric (Fourier-Spectroscopic) Measurement of Electron Energy Distributions

1990 ◽  
Vol 48 (2) ◽  
pp. 110-111 ◽  
Author(s):  
F. Hasselbach ◽  
A. Schäfer
Keyword(s):  
Group Velocity ◽  
Wave Packets ◽  
Index Of Refraction ◽  
Electron Wave ◽  
Fringe Contrast ◽  
Faraday Cage ◽  
Optical Index ◽  
Wien Filter ◽  
Coherent Wave ◽  
Electric And Magnetic Fields

Möllenstedt and Wohland proposed in 1980 two methods for measuring the coherence lengths of electron wave packets interferometrically by observing interference fringe contrast in dependence on the longitudinal shift of the wave packets. In both cases an electron beam is split by an electron optical biprism into two coherent wave packets, and subsequently both packets travel part of their way to the interference plane in regions of different electric potential, either in a Faraday cage (Fig. 1a) or in a Wien filter (crossed electric and magnetic fields, Fig. 1b). In the Faraday cage the phase and group velocity of the upper beam (Fig.1a) is retarded or accelerated according to the cage potential. In the Wien filter the group velocity of both beams varies with its excitation while the phase velocity remains unchanged. The phase of the electron wave is not affected at all in the compensated state of the Wien filter since the electron optical index of refraction in this state equals 1 inside and outside of the Wien filter.

Using the secondary electrons (SE) of SEM with NIST‘s MONSEL-II program to obtain improved linewidth measurements and slope angles of line edges on a MMIC GaAs device

1996 ◽  
Vol 54 ◽  
pp. 944-945
Author(s):  
Richard G. Sartore
Keyword(s):  
Integrated Circuits ◽  
Plasma Etching ◽  
Microwave Integrated Circuits ◽  
Monolithic Microwave Integrated Circuits ◽  
Thick Gold ◽  
Gaas Devices ◽  
Source Distance ◽  
Margin Of Error ◽  
Dimensional Measurements ◽  
Barrier Metal

In the evaluation of GaAs devices from the MMIC (Monolithic Microwave Integrated Circuits) program for Army applications, there was a requirement to obtain accurate linewidth measurements on the nominal 0.5 micrometer gate lengths used to fabricate these devices. Preliminary measurements indicated a significant variation (typically 10 % to 30% but could be more) in the critical dimensional measurements of the gate length, gate to source distance and gate to drain distance. Passivation introduced a margin of error, which was removed by plasma etching. Additionally, the high aspect ratio (4-5) of the thick gold (Au) conductors also introduced measurement difficulties. The final measurements were performed after the thick gold conductor was removed and only the barrier metal remained, which was approximately 250 nanometer thick platinum on GaAs substrate. The thickness was measured using the penetration voltage method. Linescan of the secondary electron signal as it scans across the gate is shown in Figure 1.

Silicon layers grown over SiO2 by liquid phase epitaxy: Electron Microscopical study

1990 ◽  
Vol 48 (4) ◽  
pp. 566-567
Author(s):  
F. Banhart ◽  
F.O. Phillipp ◽  
R. Bergmann ◽  
E. Czech ◽  
M. Konuma ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Liquid Phase ◽  
Plasma Etching ◽  
Liquid Phase Epitaxy ◽  
Three Dimensional ◽  
Microscopical Study ◽  
Sample Temperature ◽  
Structural Defects ◽  
Si Substrates ◽  
Etched Surface

Defect-free silicon layers grown on insulators (SOI) are an essential component for future three-dimensional integration of semiconductor devices. Liquid phase epitaxy (LPE) has proved to be a powerful technique to grow high quality SOI structures for devices and for basic physical research. Electron microscopy is indispensable for the development of the growth technique and reveals many interesting structural properties of these materials. Transmission and scanning electron microscopy can be applied to study growth mechanisms, structural defects, and the morphology of Si and SOI layers grown from metallic solutions of various compositions.The treatment of the Si substrates prior to the epitaxial growth described here is wet chemical etching and plasma etching with NF3 ions. At a sample temperature of 20°C the ion etched surface appeared rough (Fig. 1). Plasma etching at a sample temperature of −125°C, however, yields smooth and clean Si surfaces, and, in addition, high anisotropy (small side etching) and selectivity (low etch rate of SiO2) as shown in Fig. 2.

Revisiting the passivation of stainless steels and other passive CRAs

2018 ◽  
Vol 106 (1) ◽  
pp. 107 ◽  
Author(s):  
Jean- Louis Crolet
Keyword(s):  
Electrical Conductivity ◽  
Metal Ions ◽  
Base Metal ◽  
Stainless Steels ◽  
Electronic Conductivity ◽  
Transport Processes ◽  
General Knowledge ◽  
Inorganic Polymers ◽  
Faraday Cage

All that was said so far about passivity and passivation was indeed based on electrochemical prejudgments, and all based on unverified postulates. However, due the authors’ fame and for lack of anything better, the great many contradictions were carefully ignored. However, when resuming from raw experimental facts and the present general knowledge, it now appears that passivation always begins by the precipitation of a metallic hydroxide gel. Therefore, all the protectiveness mechanisms already known for porous corrosion layers apply, so that this outstanding protectiveness is indeed governed by the chemistry of transport processes throughout the entrapped water. For Al type passivation, the base metal ions only have deep and complete electronic shells, which precludes any electronic conductivity. Then protectiveness can only arise from gel thickening and densification. For Fe type passivation, an incomplete shell of superficial 3d electrons allows an early metallic or semimetallic conductivity in the gel skeleton, at the onset of the very first perfectly ordered inorganic polymers (- MII-O-MIII-O-)n. Then all depends on the acquisition, maintenance or loss of a sufficient electrical conductivity in this Faraday cage. But for both types of passive layers, all the known features can be explained by the chemistry of transport processes, with neither exception nor contradiction.

Metal-Assisted Plasma Etching of Silicon: A Liquid-Free Alternative to MACE

2018 ◽  
Author(s):  
Julia Sun ◽  
Benjamin Almquist
Keyword(s):  
Liquid Phase ◽  
Plasma Etching ◽  
Chemical Etching ◽  
Gold Films ◽  
Metallic Films ◽  
Au Catalyst ◽  
Feed Concentration ◽  
Catalytic Activities ◽  
Metal Assisted Chemical Etching ◽  
Complex Nanostructures

For decades, fabrication of semiconductor devices has utilized well-established etching techniques to create complex nanostructures in silicon. Of these, two of the most common are reactive ion etching in the gaseous phase and metal-assisted chemical etching (MACE) in the liquid phase. Though these two methods are highly established and characterized, there is a surprising scarcity of reports exploring the ability of metallic films to catalytically enhance the etching of silicon in dry plasmas via a MACE-like mechanism. Here, we discuss a <u>m</u>etal-<u>a</u>ssisted <u>p</u>lasma <u>e</u>tch (MAPE) performed using patterned gold films to catalyze the etching of silicon in an SF<sub>6</sub>/O<sub>2</sub> mixed plasma, selectively increasing the rate of etching by over 1000%. The degree of enhancement as a function of Au catalyst configuration and relative oxygen feed concentration is characterized, along with the catalytic activities of other common MACE metals including Ag, Pt, and Cu. Finally, methods of controlling the etch process are briefly explored to demonstrate the potential for use as a liquid-free fabrication strategy.

Development of Backside Scanning Capacitance Microscopy Technique for Advanced SOI Microprocessors

2006 ◽  
Author(s):  
Vinod Narang ◽  
P. Muthu ◽  
J.M. Chin ◽  
Vanissa Lim
Keyword(s):  
Plasma Etching ◽  
Data Interpretation ◽  
Parameters Optimization ◽  
Scanning Capacitance Microscopy ◽  
Microscopy Technique ◽  
Thermal Oxide ◽  
Specific Analysis ◽  
Thin Oxide ◽  
P Type ◽  
Uv Ozone

Abstract Implant related issues are hard to detect with conventional techniques for advanced devices manufactured with deep sub-micron technology. This has led to introduction of site-specific analysis techniques. This paper presents the scanning capacitance microscopy (SCM) technique developed from backside of SOI devices for packaged products. The challenge from backside method includes sample preparation methodology to obtain a thin oxide layer of high quality, SCM parameters optimization and data interpretation. Optimization of plasma etching of buried oxide followed by a new method of growing thin oxide using UV/ozone is also presented. This oxidation method overcomes the limitations imposed due to packaged unit not being able to heat to high temperature for growing thermal oxide. Backside SCM successfully profiled both the n and p type dopants in both cache and core transistors.

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