Control of Flat Band Voltage by Partial Incorporation of La2O3 or Sc2O3 into HfO2 in Metal/HfO2/SiO2/Si MOS Capacitors

2019 ◽  
Vol 11 (4) ◽  
pp. 157-167
Author(s):  
Manabu Adachi ◽  
Kouichi Okamoto ◽  
Kuniyuki Kakushima ◽  
Parhat Ahmet ◽  
Nobuyuki Sugii ◽  
...  
Keyword(s):  
Flat Band ◽  
Flat Band Voltage ◽  
Mos Capacitors

The Effect of Charge Redistribution on Flat-Band Voltage Turnaround in 4H-SiC MOS Capacitors

2017 ◽  
Vol 897 ◽  
pp. 167-170
Author(s):  
Hamid Amini Moghadam ◽  
Sima Dimitrijev ◽  
Ji Sheng Han ◽  
Daniel Haasmann
Keyword(s):  
Room Temperature ◽  
Flat Band ◽  
Gate Bias ◽  
Charge Redistribution ◽  
Flat Band Voltage ◽  
Transitional Layer ◽  
Mos Capacitors ◽  
Voltage Instability ◽  
Polar Species ◽  
Different Temperatures

The existence of a turnaround in flat-band voltage shift of stressed MOS capacitors, fabricated on N-type 4H–SiC substrates, is reported in this paper. The turnaround is observed by room-temperature C–V measurements, after two minutes gate-bias stressing of the MOS capacitors at different temperatures. The existence of this turnaround effect demonstrates that a mechanism, in addition to the well-stablished tunneling to the near-interface oxide traps, is involved in the threshold voltage instability of 4H–SiC MOSFETs. This newly identified mechanism occurs due to charge redistribution of the compound polar species that exist in the SiO2–SiC transitional layer.

Characterization of Electronic Charged States of Silicon Nanocrystals as a Floating Gate in MOS Structures

2004 ◽  
Vol 830 ◽  
Author(s):  
Seiichi Miyazaki ◽  
Taku Shibaguchi ◽  
Mitsuhisa Ikeda
Keyword(s):  
Visible Light ◽  
Energy State ◽  
Floating Gate ◽  
Flat Band ◽  
Displacement Current ◽  
Light Illumination ◽  
Flat Band Voltage ◽  
Mos Capacitors ◽  
Symmetric Pattern ◽  
Visible Light Illumination

ABSTRACTWe have studied capacitance-voltage (C-V) and displacement current-voltage characteristics of MOS capacitors with Si nanocrystals embedded in the gate oxide as a floating gate in dark and under visible light illumination at room temperature to gain a better understanding of discrete charged states of the Si-dots floating gate. The Si-dots floating gate with a dot density of 2.8×1011cm-2 and an average dot size of 8nm was fabricated on ∼2.8nm-thick thermally-grown SiO2 as a tunnel oxide by the thermal decomposition of SiH4, and covered with 7.5nm-thick control oxide prepared by thermal oxidation of a-Si. C-V characteristics of Al-gate MOS capacitors on p-type and n-type Si(100) show unique hystereses due to the charging and discharging of the Si-dots floating gate with a symmetric pattern reflecting the Fermi level of the substrate, which enable us to rule out the contribution of traps with a specific energy state to the observed hystereses. For each of high-frequency C-V curves measured in dark, a single capacitance peak appears only around a flat-band voltage condition, which is attributed to the quick flat-band voltage shift caused by the collective emission of charges retaining in the Si-dots floating gate as confirmed from the corresponding displacement current peak. Under visible light illumination, another capacitance peak due to collective charge injection to the electrically neutral Si-dots floating gate becomes observable in the inversion condition governing the on-state of MOS FETs. Thus, the optimum bias conditions for dot-floating gate MOSFETs can be predicted from the capacitor characteristics measured under light illumination.

Low Density of Interface States in n-Type 4H-SiC MOS Capacitors Achieved by Nitrogen Implantation

2005 ◽  
Vol 483-485 ◽  
pp. 693-696 ◽  
Author(s):  
Florin Ciobanu ◽  
Gerhard Pensl ◽  
Valeri V. Afanas'ev ◽  
Adolf Schöner
Keyword(s):  
Vapour Deposition ◽  
Oxidation Process ◽  
Chemical Vapour ◽  
Interface States ◽  
Conduction Band Edge ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Nitrogen Implantation ◽  
Mos Capacitors ◽  
Density Of Interface States

A surface-near Gaussian nitrogen (N) profile is implanted into n-type 4H-SiC epilayers prior to a standard oxidation process. Depending on the depth of the oxidized layer and on the implanted N concentration, the density of interface states DIT determined in corresponding 4H-SiC MOS capacitors decreases to a minimum value of approx. 1010 cm-2eV-1 in the investigated energy range (EC-(0.1 eV to 0.6 eV)), while the flat-band voltage increases to negative values due to generated fixed positive charges. A thin surface-near layer, which is highly N-doped during the chemical vapour deposition growth, leads to a reduction of DIT only close to the conduction band edge.

Study on NO Passivation on the Near Interface Electron and Hole Traps of n-Type 4H-SiC MOS Capacitors by Ultraviolet Light

2018 ◽  
Vol 924 ◽  
pp. 449-452 ◽  
Author(s):  
Yi Fan Jia ◽  
Hong Liang Lv ◽  
Xiao Yan Tang ◽  
Qing Wen Song ◽  
Yi Men Zhang ◽  
...  
Keyword(s):  
Nitric Oxide ◽  
Ultraviolet Light ◽  
Annealed Sample ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Mos Capacitors ◽  
Bias Stress ◽  
Mos Devices ◽  
Capacitance Voltage ◽  
Electron And Hole Traps

The characteristics of near interface electron and hole traps in n-type 4H-SiC MOS capacitors with and without nitric oxide (NO) passivation have been systematically investigated. The hysteresis of the bidirectional capacitance-voltage (C-V) and the shift of flat band voltage (Vfb) caused by bias stress (BS) with and without ultraviolet light (UVL) irradiation are used for studying the influence of near interface electron traps (NIETs) and near interface hole traps (NIHTs). Compared with Ar annealed process, NO passivation can effectively reduce the density of NIETs, but induce excess NIHTs in the SiC MOS devices. What’s worse is that part of the trapped hole cannot be released easily from the NIHTs in the NO annealed sample, which may act as the positive fixed charge and induce the negative shift of threshold voltage.

Ge out-diffusion and its Effect on Electrical Properties in s-Si/SiGe Devices

2006 ◽  
Vol 912 ◽  
Author(s):  
Suresh Uppal ◽  
Mehdi Kanoun ◽  
Sanatan Chattopadhyay ◽  
Rimoon Agaiby ◽  
Sarah H. Olsen ◽  
...  
Keyword(s):  
Activation Energy ◽  
Layer Thickness ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Strained Si ◽  
Mos Capacitors ◽  
Exponential Factor ◽  
Strained Layer ◽  
Exponential Increase ◽  
Flatband Voltage

AbstractIn this paper we report on the quantification of Ge diffusion in strained Si/SiGe (s-Si/SiGe) structures for different Ge content in the SiGe virtual substrate. Using TCAD tools, the diffusivity has been calculated by varying pre-exponential factor and activation energy for Ge diffusion in s-Si and SiGe layers separately and obtaining a fit to the SIMS profiles. We observe an exponential and a linear dependence of pre-factor and activation energy for Ge diffusion in s-Si and SiGe, respectively, which is in agreement with literature. As a result of diffusion, the carrier confinement in thin strained layer reduces and the mobility is affected. Using C-V measurements on MOS capacitors fabricated along with devices, a shift in the flat band voltage has been observed and is attributed to a change in the interface trapped and fixed oxide charge. We observe a stronger effect of the variation of strained layer thickness than Ge content on the change in the flatband voltage. This observation is consistent with an exponential increase in Ge arriving at the interface with decrease in strained layer thickness.

Optical Response of Si-Quantum-Dots/NiSi-Nanodots Stack Hybrid Floating Gate in MOS Structures

2011 ◽  
Vol 470 ◽  
pp. 135-139 ◽  
Author(s):  
Naoya Morisawa ◽  
Mitsuhisa Ikeda ◽  
Katsunori Makihara ◽  
Seiichi Miyazaki
Keyword(s):  
Quantum Dots ◽  
Electron Tunneling ◽  
Floating Gate ◽  
Light Irradiation ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Si Substrate ◽  
Mos Capacitors ◽  
Mos Structures ◽  
Si Quantum Dots

We have studied the effect of 1310 nm light irradiation on the charge distribution of a hybrid floating gate consisting of silicon quantum dots (Si-QDs) and NiSi Nanodots (NiSi-NDs) in MOS capacitors. The light irradiation resulted in reduced flat-band voltage shifts of the MOS capacitors in comparison to the shift in the dark. This result can be interpreted in terms of the shift of the charge centroid toward the gate side in the hybrid floating gate caused by the photoexcitation of electrons in NiSi-NDs and the subsequent electron tunneling to Si-QDs. The capacitance of the MOS capacitors at constant gate biases was modulated with pulsed light irradiation. When the light irradiation was turned off, capacitance recovered to its level in the dark, indicating that the photoexited charges were transferred between the Si-QDs and the NiSi-NDs without being emitted to the Si substrate and gate electrode.

Flat-band Voltage Shift of MOS Capacitors with Tantalum Nitride Gate Electrodes Induced by Post Metallization Annealing

2003 ◽  
Vol 786 ◽  
Author(s):  
M. Kadoshima ◽  
K. Yamamoto ◽  
H. Fujiwara ◽  
K. Akiyama ◽  
K. Tominaga ◽  
...  
Keyword(s):  
Chemical Vapor ◽  
Tantalum Nitride ◽  
Flat Band ◽  
Processing Temperature ◽  
Flat Band Voltage ◽  
Gate Electrode ◽  
Mos Capacitors ◽  
Effective Work ◽  
Effective Work Function ◽  
Vapor Deposition Technique

ABSTRACTWe have investigated the flat-band voltage (VFB) shifts of tantalum nitride gate MOS capacitors prepared by two methods. One is CVD-tantalum nitride (CVD-TaN) deposited by the chemical vapor deposition technique using Ta[NC(CH3)2C2H5][N(CH3)2]3 as a precursor, and the other one is sputtered tantalum nitride (sp-TaN) electrodes deposited by reactive DC magnetron sputtering. In the case of the CVD-TaN electrodes, the effective work function estimated from the relationship between VFB and the equivalent oxide thickness (EOT) of the MOS capacitors was about 4.4eV after post metallization annealing (PMA) at 400°C, and shifted to the mid-gap after PMA at 950°C. Moreover, the VFB values of MOS capacitors with sp-TaN electrodes also showed the same behavior after PMA. This shift is mainly dependent on the PMA temperature, regardless of the deposition method used. Similar VFB shifts induced by PMA were also observed in sp-TaN/ Al2O3/ SiO2/ p-Si and sp-TaN/ TaOx/ SiO2/ p-Si capacitors. However, in the case of the sp-TaN/ TaOx/ SiO2/ p-Si capacitors, the VFB shift was also observed when the PDA temperature after the TaOx deposition was 800°C and the PMA temperature after the TaN deposition was only 400°C. These results strongly suggest that this VFB shift caused by the PMA originates from a thin interfacial oxide layer between the TaN gate electrode and the dielectrics. Therefore, the maximum processing temperature after gate electrode deposition is important in order to control the threshold voltage of tantalum nitride gate MOSFETs.

Oxide Charging Effects by PH3/He Ion Shower Doping

2000 ◽  
Vol 621 ◽  
Author(s):  
Cheon-Hong Kim ◽  
Juhn-Suk Yoo ◽  
Kee-Chan Park ◽  
Min-Koo Han
Keyword(s):  
Metal Oxide ◽  
Thermal Annealing ◽  
Oxide Films ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Flat Band Voltage ◽  
Mos Capacitors ◽  
Voltage Shift ◽  
Mos Structure

ABSTRACTWe report the oxide charging effects on metal oxide semiconductor (MOS) structure caused by PH3/He ion shower doping. The parallel negative shift of flat-band voltage occurred for the ion-doped PETEOS samples even after thermal annealing. When the ion dose was higher, this shift was larger. These results show that a considerable amount of positive charges were induced inside the oxide films after PH3/He ion shower doping process. For the same ion dose, the flat-band voltage shift is larger when the thickness of PETEOS is thicker. When the ion dose was 1.5×1017cm−2 and the thickness of PETEOS was 80nm, the shift of flat-band voltage was larger than −7V. We can conclude that PH3/He ion shower doping process induces the positive charges, which result in the flat band voltage shift of MOS capacitors, in the bulk oxide films when oxide films are exposed to ion shower doping.

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