High-Performance Low-Voltage Tetracene Phototransistors with Polymer∕AlO[sub x] Bilayer Dielectric

2006 ◽  
Vol 9 (9) ◽  
pp. G289 ◽  
Author(s):  
Jeong-M. Choi ◽  
Kimoon Lee ◽  
D. K. Hwang ◽  
Ji Hoon Park ◽  
Eugene Kim ◽  
...  
Keyword(s):  
High Performance ◽  
Low Voltage ◽  
Bilayer Dielectric

Current State of Biological High-Resolution Scanning Electron Microscopy

1988 ◽  
Vol 46 ◽  
pp. 180-181 ◽  
Author(s):  
Klaus-Ruediger Peters
Keyword(s):  
High Performance ◽  
Low Voltage ◽  
Backscattered Electrons ◽  
Lens Position ◽  
Low Voltage Operation ◽  
Signal Collection ◽  
Probe Size ◽  
Electron Microscopes ◽  
Scanning Electron Microscopes ◽  
Scanning Electron

A new generation of high performance field emission scanning electron microscopes (FSEM) is now commercially available (JEOL 890, Hitachi S 900, ISI OS 130-F) characterized by an "in lens" position of the specimen where probe diameters are reduced and signal collection improved. Additionally, low voltage operation is extended to 1 kV. Compared to the first generation of FSEM (JE0L JSM 30, Hitachi S 800), which utilized a specimen position below the final lens, specimen size had to be reduced but useful magnification could be impressively increased in both low (1-4 kV) and high (5-40 kV) voltage operation, i.e. from 50,000 to 200,000 and 250,000 to 1,000,000 x respectively.At high accelerating voltage and magnification, contrasts on biological specimens are well characterized1 and are produced by the entering probe electrons in the outmost surface layer within -vl nm depth. Backscattered electrons produce only a background signal. Under these conditions (FIG. 1) image quality is similar to conventional TEM (FIG. 2) and only limited at magnifications >1,000,000 x by probe size (0.5 nm) or non-localization effects (%0.5 nm).

Transient self back-biased buffer for low-voltage high-performance applications in standard CMOS technologies

1999 ◽  
Vol 35 (2) ◽  
pp. 112 ◽  
Author(s):  
Y. Moisiadis ◽  
I. Bouras ◽  
C. Papadas ◽  
J.-P. Schoellkopf
Keyword(s):  
High Performance ◽  
Low Voltage

A Low-Voltage High-Performance Frequency Divider exploiting Folded MCML

2021 ◽  
Author(s):  
Francesco Centurelli ◽  
Giuseppe Scotti ◽  
Alessandro Trifiletti ◽  
Gaetano Palumbo
Keyword(s):  
High Performance ◽  
Low Voltage ◽  
Frequency Divider

scholarly journals Reliability-Oriented Design of Inverter-Fed Low-Voltage Electrical Machines: Potential Solutions

Energies ◽  
2021 ◽  
Vol 14 (14) ◽  
pp. 4144
Author(s):  
Yatai Ji ◽  
Paolo Giangrande ◽  
Vincenzo Madonna ◽  
Weiduo Zhao ◽  
Michael Galea
Keyword(s):  
Power Density ◽  
High Speed ◽  
High Performance ◽  
Low Voltage ◽  
Electrical Machines ◽  
Design Stage ◽  
Switching Frequency ◽  
Special Focus ◽  
Electrical Machine ◽  
Engineering Approach

Transportation electrification has kept pushing low-voltage inverter-fed electrical machines to reach a higher power density while guaranteeing appropriate reliability levels. Methods commonly adopted to boost power density (i.e., higher current density, faster switching frequency for high speed, and higher DC link voltage) will unavoidably increase the stress to the insulation system which leads to a decrease in reliability. Thus, a trade-off is required between power density and reliability during the machine design. Currently, it is a challenging task to evaluate reliability during the design stage and the over-engineering approach is applied. To solve this problem, physics of failure (POF) is introduced and its feasibility for electrical machine (EM) design is discussed through reviewing past work on insulation investigation. Then the special focus is given to partial discharge (PD) whose occurrence means the end-of-life of low-voltage EMs. The PD-free design methodology based on understanding the physics of PD is presented to substitute the over-engineering approach. Finally, a comprehensive reliability-oriented design (ROD) approach adopting POF and PD-free design strategy is given as a potential solution for reliable and high-performance inverter-fed low-voltage EM design.

A high-performance very low-voltage current sense amplifier for nonvolatile memories

2005 ◽  
Vol 40 (2) ◽  
pp. 507-514 ◽  
Author(s):  
A. Conte ◽  
G.L. Giudice ◽  
G. Palumbo ◽  
A. Signorello
Keyword(s):  
High Performance ◽  
Low Voltage ◽  
Sense Amplifier ◽  
Nonvolatile Memories

Electrical packaging requirements for low-voltage ICs-3.3 V high-performance CMOS devices as a case study

1994 ◽  
Vol 17 (4) ◽  
pp. 493-504 ◽  
Author(s):  
R. Senthinathan ◽  
A. Mehra ◽  
M. Mahalingam ◽  
Y. Doi ◽  
H. Astrain
Keyword(s):  
High Performance ◽  
Low Voltage

Design and Layout of a High-Performance PWM Control Class D Amplifiers IC Systems

2012 ◽  
Vol 203 ◽  
pp. 469-473
Author(s):  
Ruei Chang Chen ◽  
Shih Fong Lee
Keyword(s):  
Low Power ◽  
High Performance ◽  
Low Voltage ◽  
Design Flow ◽  
Total Power ◽  
Cmos Process ◽  
Low Power Circuits ◽  
Class D ◽  
Total Power Consumption ◽  
Power Circuits

This paper presents the design and implementation of a novel pulse width modulation control class D amplifiers chip. With high-performance, low-voltage, low-power and small area, these circuits are employed in portable electronic systems, such as the low-power circuits, wireless communication and high-frequency circuit systems. This class D chip followed the chip implementation center advanced design flow, and then was fabricated using Taiwan Semiconductor Manufacture Company 0.35-μm 2P4M mixed-signal CMOS process. The chip supply voltage is 3.3 V which can operate at a maximum frequency of 100 MHz. The total power consumption is 2.8307 mW, and the chip area size is 1.1497×1.1497 mm2. Finally, the class D chip was tested and the experimental results are discussed. From the excellent performance of the chip verified that it can be applied to audio amplifiers, low-power circuits, etc.

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