Influence of Passivation‐Silicon Nitride/Amorphous Silicon Interface on the Off‐Current Characteristics in Amorphous Silicon Thin‐Film Transistors

1991 ◽  
Vol 138 (5) ◽  
pp. 1474-1480 ◽  
Author(s):  
Akira Sanjoh ◽  
Naoki Ikeda ◽  
Kenji Komaki
Keyword(s):  
Thin Film ◽  
Silicon Nitride ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Silicon Thin Film ◽  
Current Characteristics ◽  
Silicon Interface

Transient Leakage Currents in Amorphous Silicon Thin-Film Transistors

1992 ◽  
Vol 258 ◽  
Author(s):  
M. Hack ◽  
H. Steemers ◽  
R. Weisfield
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Surface States ◽  
Operating Conditions ◽  
Silicon Thin Film ◽  
Leakage Currents ◽  
Transient Behaviour ◽  
Silicon Interface ◽  
Good Agreement

ABSTRACTIn this paper we present both experimental data and computer simulations of the leakage characteristics of amorphous silicon (a-Si) thin film transistors operated under time transient conditions. The transient behaviour of these devices for realistic operating conditions is often very different from their steady-state characteristics, due to the slow response of deep traps in a-Si. Our model is in good agreement with the data and realistically accounts for the time-dependent behaviour of amorphous silicon with leakage being mainly determined by a combination of fixed charge in the passivation dielectric and a distribution of surface states at the top silicon interface. We show how voltage pulses applied to the gate of a TFT affect its performance as a pixel switch in a two-dimensional array. In particular we concentrate on the effects of light and bias stressing.

Material Properties Controlling the Performance of Amorphous Silicon Thin Film Transistors

1984 ◽  
Vol 33 ◽  
Author(s):  
M. J. Powell
Keyword(s):  
Thin Film ◽  
Silicon Nitride ◽  
Amorphous Silicon ◽  
Density Of States ◽  
Threshold Voltage ◽  
Material Properties ◽  
Thin Film Transistors ◽  
Gate Insulator ◽  
Dangling Bond ◽  
Silicon Thin Film

ABSTRACTAmorphous silicon thin film transistors have been fabricated with a number of different structures and materials. To date, the best performance is obtained with amorphous silicon - silicon nitride thin film transistors in the inverted staggered electrode structure, where the gate insulator and semiconductor are deposited sequentially by plasma enhanced chemical vapour deposition in the same growth apparatus.Localised electron states in the amorphous silicon are crucial in determining transistor performance. Conduction band states (Si-Si antibonding σ*) are broadened and localised in the amorphous network, and their energy distribution determines the field effect mobility. The silicon dangling bond defect is the most important deep localised state and their density determines the prethreshold current and hence the threshold voltage. The density of states is influenced by the gate insulator interface and there is probably a decreasing density of states away from this interface. The silicon dangling bond defect in the bulk amorphous silicon nitride also leads to a localised gap state, which is responsible for the observed threshold voltage instability.Other key material properties include the fixed charge densities associated with primary passivating layers placed on top of the amorphous silicon. The low value of the bulk density of states in the amorphous silicon layer increases the sensitivity of device characteristics to charge at the top interface.

Improvement of Gate-Insulator/Silicon Interface Characteristics in Amorphous Silicon Thin Film Transistors

1994 ◽  
Vol 33 (Part 2, No. 6B) ◽  
pp. L834-L836 ◽  
Author(s):  
Toshiyuki Sameshima ◽  
Atsusi Kohno ◽  
Mitsunobu Sekiya ◽  
Masaki Hara ◽  
Naoki Sano
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Gate Insulator ◽  
Silicon Thin Film ◽  
Interface Characteristics ◽  
Silicon Interface

The Instability Characteristics of Amorphous Silicon Thin Film Transistors with Various Interfacial and Bulk Defect States

1997 ◽  
Vol 36 (Part 1, No. 10) ◽  
pp. 6226-6229 ◽  
Author(s):  
Huang-Chung Cheng ◽  
Jun-Wei Tsai ◽  
Chun-Yao Huang ◽  
Fang-Chen Luo ◽  
Hsing-Chien Tuan
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Defect States ◽  
Silicon Thin Film

Hot-Wire Deposited Amorphous Silicon Thin-Film Transistors

1996 ◽  
Vol 424 ◽  
Author(s):  
R. E. I. Schropp ◽  
K. F. Feenstra ◽  
C. H. M. Van Der Werf ◽  
J. Holleman ◽  
H. Meiling
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Chemical Vapor ◽  
Current Crowding ◽  
Hot Wire ◽  
Saturation Regime ◽  
Silicon Thin Film ◽  
Order Of Magnitude

AbstractWe present the first thin film transistors (TFTs) incorporating a low hydrogen content (5 - 9 at.-%) amorphous silicon (a-Si:H) layer deposited by the Hot-Wire Chemical Vapor Deposition (HWCVD) technique. This demonstrates the possibility of utilizing this material in devices. The deposition rate by Hot-Wire CVD is an order of magnitude higher than by Plasma Enhanced CVD. The switching ratio for TFTs based on HWCVD a-Si:H is better than 5 orders of magnitude. The field-effect mobility as determined from the saturation regime of the transfer characteristics is still quite poor. The interface with the gate dielectric needs further optimization. Current crowding effects, however, could be completely eliminated by a H2 plasma treatment of the HW-deposited intrinsic layer. In contrast to the PECVD reference device, the HWCVD device appears to be almost unsensitive to bias voltage stressing. This shows that HW-deposited material might be an approach to much more stable devices.

Sign in / Sign up

Export Citation Format

Share Document