Investigation of Nonstationary Transport and Quantum Effects in Realistic Deep Submicrometer Partially Depleted SOI Technology

2002 ◽  
Vol 5 (5) ◽  
pp. G29 ◽  
Author(s):  
D. Munteanu ◽  
G. Le Carval ◽  
C. Fenouillet-Béranger ◽  
O. Faynot
Keyword(s):  
Quantum Effects ◽  
Deep Submicrometer ◽  
Nonstationary Transport ◽  
Soi Technology

Quantum effects in low-energy photofission of heavy nuclei

1984 ◽  
Vol 144 (9) ◽  
pp. 3 ◽  
Author(s):  
Yurii M. Tsipenyuk ◽  
Yu.B. Ostapenko ◽  
G.N. Smirenkin ◽  
A.S. Soldatov
Keyword(s):  
Quantum Effects ◽  
Low Energy ◽  
Heavy Nuclei

Quantum effects in a system of Boltzmann hard spheres

2018 ◽  
Vol 189 (06) ◽  
pp. 659-664
Author(s):  
Sergei M. Stishov
Keyword(s):  
Hard Spheres ◽  
Quantum Effects

Two scales of quantum effects in a mesoscopic system of degenerate electrons

2020 ◽  
Author(s):  
Sergei E. Kuratov ◽  
Dmitry S. Shidlovski ◽  
Sergei I. Blinnikov ◽  
Sergey Yu. Igashov
Keyword(s):  
Quantum Effects ◽  
Mesoscopic System

Sigma-Delta ADC on SOI Technology for Working at High Temperatures

2020 ◽  
Vol 63 (11) ◽  
pp. 586-595
Author(s):  
Alexander Korotkov ◽  
Dmitry Morozov ◽  
Mikhail Pilipko ◽  
Mikhail Yenuchenko
Keyword(s):  
High Temperatures ◽  
Sigma Delta ◽  
Sigma Delta Adc ◽  
Soi Technology

Application of FIB Circuit Edit in Analysis of Memory Failure of SOI Devices

2006 ◽  
Author(s):  
Z. G. Song ◽  
S. K. Loh ◽  
X. H. Zheng ◽  
S.P. Neo ◽  
C. K. Oh
Keyword(s):  
Focused Ion Beam ◽  
Ion Beam ◽  
Electrical Characterization ◽  
Silicon On Insulator ◽  
First Case ◽  
Edx Analyses ◽  
Memory Failure ◽  
Soi Devices ◽  
Voltage Contrast ◽  
Soi Technology

Abstract This article presents two cases to demonstrate the application of focused ion beam (FIB) circuit edit in analysis of memory failure of silicon on insulator (SOI) devices using XTEM and EDX analyses. The first case was a single bit failure of SRAM units manufactured with 90 nm technology in SOI wafer. The second case was the whole column failure with a single bit pass for a SRAM unit. From the results, it was concluded that FIB circuit edit and electrical characterization is a good methodology for further narrowing down the defective location of memory failure, especially for SOI technology, where contact-level passive voltage contrast is not suitable.

Electron Beam Absorbed Current as a Means of Locating Metal Defectivity on 45nm SOI Technology

2010 ◽  
Author(s):  
K. Dickson ◽  
G. Lange ◽  
K. Erington ◽  
J. Ybarra
Keyword(s):  
Electron Beam ◽  
Flip Chip ◽  
Back Side ◽  
Soi Technology

Abstract This paper describes the use of Electron Beam Absorbed Current (EBAC) mapping performed from the back side of the device as a means of locating metallization defects on flip chip 45nm SOI technology.

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