A VLSI Design Verification Strategy

1982 ◽  
Vol 26 (4) ◽  
pp. 475-484 ◽  
Author(s):  
Arnold S. Tran ◽  
Richard A. Forsberg ◽  
Jack C. Lee
Keyword(s):  
Vlsi Design ◽  
Design Verification ◽  
Verification Strategy

scholarly journals Georgia Tech GT-VDAG VLSI Design Verification Document

1991 ◽  
Author(s):  
Sam H. Russ ◽  
Wei Siong Tan ◽  
Toshiro Kubota
Keyword(s):  
Vlsi Design ◽  
Design Verification ◽  
Georgia Tech

scholarly journals Integration of SPICE with TEK LV500 ASIC Design Verification System

VLSI Design ◽  
1996 ◽  
Vol 4 (1) ◽  
pp. 69-74 ◽  
Author(s):  
A. Srivastava ◽  
S. R. Palavali
Keyword(s):  
Vlsi Design ◽  
Design Verification ◽  
Two Phase ◽  
C Language ◽  
Asic Design ◽  
Software Interface ◽  
Generator Circuit ◽  
Testing Tools ◽  
Verification System ◽  
Testing Stage

The present work involves integration of the simulation stage of design of a VLSI circuit and its testing stage. The SPICE simulator, TEK LV500 ASIC Design Verification System, and TekWaves, a test program generator for LV500, were integrated. A software interface in ‘C’ language in UNIX ‘solaris 1.x’ environment has been developed between SPICE and the testing tools (TekWAVES and LV500). The function of the software interface developed is multifold. It takes input from either SPICE2G.6 or SPICE 3e.1. The output generated by the interface software can be given as an input to either TekWAVES or LV500. A graphical user interface has also been developed with OPENWlNDOWS using Xview tool kit on SUN workstation. As an example, a two phase clock generator circuit has been considered and usefulness of the software demonstrated. The interface software could be easily linked with VLSI design such as MAGIC layout editor.

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