Unroll-and-jam for imperfectly-nested loops in DSP applications

2000 ◽  
Author(s):  
Yonghong Song ◽  
Yuan Lin
Keyword(s):  
Nested Loops ◽  
Dsp Applications

HyDRA: Hybrid Dynamically Reconfigurable Architecture for DSP Applications

2016 ◽  
Vol E99.C (7) ◽  
pp. 866-877 ◽  
Author(s):  
Abdulfattah M. OBEID ◽  
Syed Manzoor QASIM ◽  
Mohammed S. BENSALEH ◽  
Abdullah A. ALJUFFRI
Keyword(s):  
Reconfigurable Architecture ◽  
Dynamically Reconfigurable ◽  
Dsp Applications ◽  
Dynamically Reconfigurable Architecture

A new FPGA architecture suitable for DSP applications

2011 ◽  
Vol 32 (5) ◽  
pp. 055012
Author(s):  
Liyun Wang ◽  
Jinmei Lai ◽  
Jiarong Tong ◽  
Pushan Tang ◽  
Xing Chen ◽  
...  
Keyword(s):  
Fpga Architecture ◽  
Dsp Applications

Topology and computational-power aware tile mapping of perfectly nested loops with dependencies on distributed systems

2019 ◽  
Vol 129 ◽  
pp. 14-35 ◽  
Author(s):  
Ebrahim Zarei Zefreh ◽  
Shahriar Lotfi ◽  
Leyli Mohammad Khanli ◽  
Jaber Karimpour
Keyword(s):  
Distributed Systems ◽  
Computational Power ◽  
Nested Loops ◽  
Tile Mapping

scholarly journals Smart analytical signature verification for DSP applications

2013 ◽  
Author(s):  
Rozita Teymourzadeh ◽  
Waidhuba Martin Kizito ◽  
Kok Wai Chan ◽  
Mok Vee Hoong
Keyword(s):  
Signature Verification ◽  
Dsp Applications
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