A generic tool set for application specific processor architectures

2000 ◽  
Author(s):  
Frank Engel ◽  
Johannes Nührenberg ◽  
Gerhard P. Fettweis
Keyword(s):  
Processor Architectures ◽  
Tool Set ◽  
Application Specific

Reconfigurable Components for Application-Specific Processor Architectures

2010 ◽  
pp. 25-49 ◽  
Author(s):  
Tobias G. Noll ◽  
Thorsten von Sydow ◽  
Bernd Neumann ◽  
Jochen Schleifer ◽  
Thomas Coenen ◽  
...  
Keyword(s):  
Processor Architectures ◽  
Application Specific

Self-Repair by Program Reconfiguration in VLIW Processor Architectures

2011 ◽  
pp. 241-267
Author(s):  
Mario Schölzel ◽  
Pawel Pawlowski ◽  
Adam Dabrowski
Keyword(s):  
Embedded Systems ◽  
Cmos Technology ◽  
Parallel Execution ◽  
Data Path ◽  
Scalable Algorithms ◽  
Control Logic ◽  
Processor Architectures ◽  
On Line ◽  
Word Processors ◽  
Application Specific

Statically scheduled superscalar processors (e.g. very long instruction word processors) are characterized by multiple parallel execution units and small sized control logic. This makes them easy scalable and therefore attractive for the use in embedded systems as application specific processors. The shrinking feature size in CMOS technology makes such processors in long living embedded systems more susceptible to several types of faults. Therefore, it should be possible to run an application, even if one or more components in the data path of a statically scheduled processor become permanently faulty. Then it becomes necessary either to reconfigure the hardware or to reconfigure the executed program such that operations are scheduled around the faulty units. The authors present recent investigations to reschedule operations in the field either on-line in hardware or off-line in software. Thus, the reconfiguration of the program is either done dynamically by the hardware or permanently by self-modifying code. If a permanent fault is present in the data path, then in both cases a delay may occur during the execution of the application. This graceful performance degradation may become critical for real-time applications. A framework to overcome this problem by using scalable algorithms is provided, too.

A Fast and Retargetable Simulator for Application Specific Processor Architectures

2001 ◽  
pp. 87-96 ◽  
Author(s):  
Frank Engel ◽  
Johannes Nührenberg ◽  
Gerhard P. Fettweis
Keyword(s):  
Processor Architectures ◽  
Application Specific

Cluster Generation and Network Component Insertion for Topology Synthesis of Application-Specific Network-on-Chips

2012 ◽  
Vol E95-C (4) ◽  
pp. 534-545 ◽  
Author(s):  
Wei ZHONG ◽  
Takeshi YOSHIMURA ◽  
Bei YU ◽  
Song CHEN ◽  
Sheqin DONG ◽  
...  
Keyword(s):  
Cluster Generation ◽  
Application Specific ◽  
Network Component
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