Synthesizing programs that expose performance bottlenecks

Author(s):  
Luca Della Toffola ◽  
Michael Pradel ◽  
Thomas R. Gross
1997 ◽  
Vol 5 (3) ◽  
pp. 28-37 ◽  
Author(s):  
F. Heinze ◽  
L. Schafers ◽  
C. Scheidler ◽  
W. Obeloer

2017 ◽  
Vol 16 (6) ◽  
pp. 1773-1785 ◽  
Author(s):  
Yi Gao ◽  
Wei Dong ◽  
Haocheng Huang ◽  
Jiajun Bu ◽  
Chun Chen ◽  
...  

2015 ◽  
Vol 34 (3) ◽  
pp. 401-410 ◽  
Author(s):  
A. Aboulhassan ◽  
D. Baum ◽  
O. Wodo ◽  
B. Ganapathysubramanian ◽  
A. Amassian ◽  
...  

2021 ◽  
Author(s):  
Yifan Sun ◽  
Yixuan Zhang ◽  
Ali Mosallaei ◽  
Michael D. Shah ◽  
Cody Dunne ◽  
...  

Graphics Processing Units~(GPUs) have been widely used to accelerate artificial intelligence, physics simulation, medical imaging, and information visualization applications. To improve GPU performance, GPU hardware designers need to identify performance issues by inspecting a huge amount of simulator-generated traces. Visualizing the execution traces can reduce the cognitive burden of users and facilitate making sense of behaviors of GPU hardware components. In this paper, we first formalize the process of GPU performance analysis and characterize the design requirements of visualizing execution traces based on a survey study and interviews with GPU hardware designers. We contribute data and task abstraction for GPU performance analysis. Based on our task analysis, we propose Daisen, a framework that supports data collection from GPU simulators and provides visualization of the simulator-generated GPU execution traces. Daisen features a data abstraction and trace format that can record simulator-generated GPU execution traces. Daisen also includes a web-based visualization tool that helps GPU hardware designers examine GPU execution traces, identify performance bottlenecks, and verify performance improvement. Our qualitative evaluation with GPU hardware designers demonstrates that the design of Daisen reflects the typical workflow of GPU hardware designers. Using Daisen, participants were able to effectively identify potential performance bottlenecks and opportunities for performance improvement. The open-sourced implementation of Daisen can be found at gitlab.com/akita/vis. Supplemental materials including a demo video, survey questions, evaluation study guide, and post-study evaluation survey are available at osf.io/j5ghq.


2019 ◽  
Author(s):  
Loïc Fürhoff

Although the notion of ‘too many markers’ have been mentioned in several research, in practice, displaying hundreds of Points of Interests (POI) on a web map in two dimensions with an acceptable usability remains a real challenge. Web practitioners often make an excessive use of clustering aggregation to overcome performance bottlenecks without successfully resolving issues of perceived performance. This paper tries to bring a broad awareness by identifying sample issues which describe a general reality of clustering, and provide a pragmatic survey of potential technologies optimisations. At the end, we discuss the usage of technologies and the lack of documented client-server workflows, along with the need to enlarge our vision of the various clutter reduction methods.


2020 ◽  
Vol 29 (6) ◽  
pp. 1223-1241
Author(s):  
Alexander van Renen ◽  
Lukas Vogel ◽  
Viktor Leis ◽  
Thomas Neumann ◽  
Alfons Kemper

AbstractI/O latency and throughput are two of the major performance bottlenecks for disk-based database systems. Persistent memory (PMem) technologies, like Intel’s Optane DC persistent memory modules, promise to bridge the gap between NAND-based flash (SSD) and DRAM, and thus eliminate the I/O bottleneck. In this paper, we provide the first comprehensive performance evaluation of PMem on real hardware in terms of bandwidth and latency. Based on the results, we develop guidelines for efficient PMem usage and four optimized low-level building blocks for PMem applications: log writing, block flushing, in-place updates, and coroutines for write latency hiding.


2003 ◽  
Vol 13 (02) ◽  
pp. 169-187 ◽  
Author(s):  
ANNA MORAJKO ◽  
OLEG MORAJKO ◽  
JOSEP JORBA ◽  
TOMÀS MARGALEF ◽  
EMILIO LUQUE

The classical way of tuning parallel/distributed applications is based on the analysis of the monitoring information obtained from an execution of the application. However, this "measure and modify" approach is not feasible when the applications have a dynamic behavior. In this case, another approach is required to accomplish performance expectations. This paper presents a solution based on the dynamic tuning approach that addresses these issues. In this approach, an application is monitored, its performance bottlenecks are detected and the application is modified automatically during the execution, without stopping, recompiling or re-running it. The introduced modifications adapt the behavior of the application to dynamic variations.


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