scholarly journals Using Efficient Path Profiling to Optimize Memory Consumption of On-Chip Debugging for High-Level Synthesis

2017 ◽  
Vol 16 (5s) ◽  
pp. 1-19 ◽  
Author(s):  
Pietro Fezzardi ◽  
Marco Lattuada ◽  
Fabrizio Ferrandi
Keyword(s):  
High Level Synthesis ◽  
Memory Consumption ◽  
Path Profiling ◽  
On Chip ◽  
High Level

High-level synthesis of on-chip multiprocessor architectures based on answer set programming

2018 ◽  
Vol 117 ◽  
pp. 161-179 ◽  
Author(s):  
Christophe Bobda ◽  
Franck Yonga ◽  
Martin Gebser ◽  
Harold Ishebabi ◽  
Torsten Schaub
Keyword(s):  
Answer Set Programming ◽  
Chip Multiprocessor ◽  
High Level Synthesis ◽  
Multiprocessor Architectures ◽  
On Chip ◽  
High Level ◽  
Answer Set

scholarly journals System-on-Chip Design Using High-Level Synthesis Tools

2012 ◽  
Vol 03 (01) ◽  
pp. 1-9 ◽  
Author(s):  
Erdal Oruklu ◽  
Richard Hanley ◽  
Semih Aslan ◽  
Christophe Desmouliers ◽  
Fernando M. Vallina ◽  
...  
Keyword(s):  
System On Chip ◽  
High Level Synthesis ◽  
Chip Design ◽  
On Chip ◽  
High Level
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