Buffer insertion for clock delay and skew minimization

Proceedings of the 1999 international symposium on Physical design - ISPD '99 ◽

10.1145/299996.300015 ◽

1999 ◽

Cited By ~ 16

Author(s):

X. Zeng ◽

D. Zhou ◽

Wei Li

Keyword(s):

Buffer Insertion

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Buffer Insertion and Sizing in Clock Distribution Networks with Gradual Transition Time Relaxation for Reduced Power Consumption

2007 14th IEEE International Conference on Electronics, Circuits and Systems ◽

10.1109/icecs.2007.4511123 ◽

2007 ◽

Cited By ~ 6

Author(s):

Sherif A. Tawfik ◽

Volkan Kursun

Keyword(s):

Power Consumption ◽

Distribution Networks ◽

Transition Time ◽

Gradual Transition ◽

Clock Distribution ◽

Buffer Insertion ◽

Time Relaxation ◽

Clock Distribution Networks ◽

Reduced Power Consumption

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$O(mn)$ Time Algorithm for Optimal Buffer Insertion of Nets With $m$ Sinks

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2011.2174639 ◽

2012 ◽

Vol 31 (3) ◽

pp. 437-441 ◽

Cited By ~ 7

Author(s):

Zhuo Li ◽

Ying Zhou ◽

Weiping Shi

Keyword(s):

Time Algorithm ◽

Buffer Insertion

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Buffer Insertion Basics

Handbook of Algorithms for Physical Design Automation ◽

10.1201/9781420013481-26 ◽

2008 ◽

pp. 535-556

Author(s):

Jiang Hu ◽

Zhuo Li ◽

Shiyan Hu

Keyword(s):

Buffer Insertion

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A Priority Buffer Insertion Ring Protocol For Local Area Networks

International Journal of Modelling and Simulation ◽

10.1080/02286203.1998.11760355 ◽

1998 ◽

Vol 18 (1) ◽

pp. 36-44

Author(s):

A. Shaout ◽

P.A. Pietrzyk

Keyword(s):

Local Area Networks ◽

Local Area ◽

Buffer Insertion ◽

A Priority

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Timing driven buffer insertion for carbon nanotube interconnects

Nano-CMOS and Post-CMOS Electronics: Devices and Modelling ◽

10.1049/pbcs029e_ch10 ◽

2016 ◽

pp. 287-312 ◽

Cited By ~ 1

Author(s):

Lin Liu ◽

Shiyan Hu ◽

Yuchen Zhou

Keyword(s):

Carbon Nanotube ◽

Buffer Insertion

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Buffer insertion with adaptive blockage avoidance

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2003.809647 ◽

2003 ◽

Vol 22 (4) ◽

pp. 492-498 ◽

Cited By ~ 9

Author(s):

Jiang Hu ◽

C.J. Alpert ◽

S.T. Quay ◽

G. Gandham

Keyword(s):

Buffer Insertion

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A loss-free access control mechanism on high-speed buffer insertion rings

Proceedings of IEEE Singapore International Conference on Networks and International Conference on Information Engineering '95 ◽

10.1109/sicon.1995.526054 ◽

2002 ◽

Author(s):

W.F. Wang ◽

L.Y. Kung

Keyword(s):

Access Control ◽

High Speed ◽

Control Mechanism ◽

Free Access ◽

Buffer Insertion ◽

Access Control Mechanism

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A fully polynomial time approximation scheme for timing driven minimum cost buffer insertion

Proceedings of the 46th Annual Design Automation Conference on ZZZ - DAC '09 ◽

10.1145/1629911.1630026 ◽

2009 ◽

Cited By ~ 8

Author(s):

Shiyan Hu ◽

Zhuo Li ◽

Charles J. Alpert

Keyword(s):

Polynomial Time ◽

Approximation Scheme ◽

Minimum Cost ◽

Buffer Insertion ◽

Polynomial Time Approximation Scheme ◽

Time Approximation ◽

Polynomial Time Approximation

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Maze routing with buffer insertion under transition time constraints

Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition ◽

10.1109/date.2002.998376 ◽

2003 ◽

Author(s):

Li-Da Huang ◽

Minghorng Lai ◽

D.F. Wong ◽

Youxin Gao

Keyword(s):

Transition Time ◽

Time Constraints ◽

Buffer Insertion

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Minimal buffer insertion in clock trees with skew and slew rate constraints

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.602470 ◽

1997 ◽

Vol 16 (4) ◽

pp. 333-342 ◽

Cited By ~ 62

Author(s):

G.E. Tellez ◽

M. Sarrafzadeh

Keyword(s):

Slew Rate ◽

Buffer Insertion ◽

Rate Constraints

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