Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques

1998 ◽  
Author(s):  
Kimiyoshi Usami ◽  
Mutsunori Igarashi ◽  
Takashi Ishikawa ◽  
Masahiro Kanazawa ◽  
Masafumi Takahashi ◽  
...  
Keyword(s):  
Low Power ◽  
Design Methodology ◽  
Voltage Scaling ◽  
Ultra Low Power

Design Methodology for Voltage-Overscaled Ultra-Low-Power Systems

2012 ◽  
Vol 59 (12) ◽  
pp. 952-956 ◽  
Author(s):  
Dongsuk Jeon ◽  
Mingoo Seok ◽  
Zhengya Zhang ◽  
David Blaauw ◽  
Dennis Sylvester
Keyword(s):  
Power Systems ◽  
Low Power ◽  
Design Methodology ◽  
Ultra Low Power

AN ULTRA-LOW-POWER CURRENT-MODE INTEGRATED CMOS INSTRUMENTATION AMPLIFIER FOR PERSONAL ECG RECORDERS

2008 ◽  
Vol 17 (06) ◽  
pp. 1053-1067 ◽  
Author(s):  
MARYAM SHOJAEI BAGHINI ◽  
SUDIP NAG ◽  
RAKESH K. LAL ◽  
DINESH K. SHARMA
Keyword(s):  
Low Power ◽  
Design Methodology ◽  
Current Mode ◽  
Corner Frequency ◽  
Noise Voltage ◽  
Instrumentation Amplifier ◽  
Ecg Signal ◽  
Signal Conditioning ◽  
Ultra Low Power ◽  
Measurement Results

This paper presents an ultra-low-power current-mode ECG instrumentation amplifier, which is designed based on the current balancing technique and fabricated in TSMC 0.35 μm CMOS process. The instrumentation amplifier, which is presented here has three features. First, the instrumentation amplifier is a full-CMOS implementation of current-balancing technique applied for ECG signal conditioning. Second, the instrumentation amplifier is of ultra-low-power due to a power-oriented design methodology, which makes its power consumption very low compared to the earlier reported works for ECG recording applications. Third, integrated programmable bandpass filtering is implemented in the amplifier itself, which provides a compact solution for analog ECG signal conditioning. Measurement results show that the amplifier only draws 9 μA current from a 3.3 V lithium-ion battery, while CMRR of 100 dB and input voltage dynamic range of ± 6 mV are achieved. By considering trade-offs between input noise voltage and power, noise performance was compromised with power and area for ultra-low-power ECG signal conditioning applications. Measurement results show [Formula: see text] input referred noise voltage with a flicker noise corner frequency of 15 Hz at 9 μA dc current and small area, which is appropriate for the desired application. Measurement results meet the recommended specifications for signal conditioning of portable ECG monitoring devices. Design methodology, fabrication considerations, measurement setup, and experimental results are also explained in this paper.

Design Methodology of Ultra-Low-Power LC-VCOs for IoT Applications

2019 ◽  
Vol 28 (07) ◽  
pp. 1950122 ◽  
Author(s):  
Imen Ghorbel ◽  
Fayrouz Haddad ◽  
Wenceslas Rahajandraibe ◽  
Mourad Loulou
Keyword(s):  
Low Power ◽  
Design Methodology ◽  
Frequency Tuning ◽  
Supply Voltage ◽  
Cmos Process ◽  
Voltage Controlled Oscillator ◽  
Ultra Low Power ◽  
Trade Offs ◽  
Process Measurements ◽  
Lc Vco

A design methodology of CMOS LC voltage-controlled oscillator (VCO) is proposed in this paper. The relation between components and specifications of the LC-VCO is studied to easily identify its design trade-offs. This methodology has been applied to design ultra-low-power LC-VCOs for different frequency bands. An LC-VCO based on the current reuse technique has been realized with the proposed methodology in 0.13[Formula: see text][Formula: see text]m CMOS process. Measurements present an ultra-low power consumption of only 262[Formula: see text][Formula: see text]W drawn from 1[Formula: see text]V supply voltage. The measured frequency tuning range is about 10% between 2.179[Formula: see text]GHz and 2.409[Formula: see text]GHz. The post-layout simulation presents a phase noise (PN) of [Formula: see text][Formula: see text]dBc/Hz, while the measured PN is [Formula: see text][Formula: see text]dBc/Hz.

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