Improving Parallelism of Recursive Stencil Computations without Sacrificing Cache Performance

2014 ◽  
Author(s):  
Yuan Tang ◽  
Ronghui You ◽  
Haibin Kan ◽  
Jesmin Jahan Tithi ◽  
Pramod Ganapathi ◽  
...  
Keyword(s):  
Cache Performance ◽  
Stencil Computations

scholarly journals Verified lifting of stencil computations

2016 ◽  
Vol 51 (6) ◽  
pp. 711-726 ◽  
Author(s):  
Shoaib Kamil ◽  
Alvin Cheung ◽  
Shachar Itzhaky ◽  
Armando Solar-Lezama
Keyword(s):  
Stencil Computations

Design of an Intelligent Data Cache with Replacement Policy

2019 ◽  
Vol 10 (2) ◽  
pp. 87-107
Author(s):  
B. Shameedha Begum ◽  
N. Ramasubramanian
Keyword(s):  
Real Time ◽  
Replacement Policy ◽  
Data Cache ◽  
Cache Performance ◽  
Performance Requirements ◽  
Novel Approach ◽  
Reconfigurable Caches ◽  
Real Time Applications ◽  
Hard Real Time ◽  
Replacement Algorithms

Embedded systems are designed for a variety of applications ranging from Hard Real Time applications to mobile computing, which demands various types of cache designs for better performance. Since real-time applications place stringent requirements on performance, the role of the cache subsystem assumes significance. Reconfigurable caches meet performance requirements under this context. Existing reconfigurable caches tend to use associativity and size for maximizing cache performance. This article proposes a novel approach of a reconfigurable and intelligent data cache (L1) based on replacement algorithms. An intelligent embedded data cache and a dynamic reconfigurable intelligent embedded data cache have been implemented using Verilog 2001 and tested for cache performance. Data collected by enabling the cache with two different replacement strategies have shown that the hit rate improves by 40% when compared to LRU and 21% when compared to MRU for sequential applications which will significantly improve performance of embedded real time application.

scholarly journals Optimization and Performance Modeling of Stencil Computations on Modern Microprocessors

SIAM Review ◽  
2009 ◽  
Vol 51 (1) ◽  
pp. 129-159 ◽  
Author(s):  
Kaushik Datta ◽  
Shoaib Kamil ◽  
Samuel Williams ◽  
Leonid Oliker ◽  
John Shalf ◽  
...  
Keyword(s):  
Performance Modeling ◽  
Stencil Computations ◽  
And Performance ◽  
Optimization And Performance

Optimizing software cache performance of packet processing applications

2007 ◽  
Vol 42 (7) ◽  
pp. 227-236
Author(s):  
Qin Wang ◽  
Junpu Chen ◽  
Weihua Zhang ◽  
Min Yang ◽  
Binyu Zang
Keyword(s):  
Packet Processing ◽  
Cache Performance ◽  
Software Cache
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