Floating Gate Metal–Oxide–Semiconductor Capacitor Employing Array of High-Density Nanodots Produced by Protein Supramolecule

2006 ◽  
Vol 45 (11) ◽  
pp. 8946-8951 ◽  
Author(s):  
Kiyohito Yamada ◽  
Shigeo Yoshii ◽  
Shinya Kumagai ◽  
Atsushi Miura ◽  
Yukiharu Uraoka ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Metal Oxide Semiconductor ◽  
High Density ◽  
Floating Gate ◽  
Oxide Semiconductor ◽  
Metal Oxide Semiconductor Capacitor

Memory characteristics of metal-oxide-semiconductor capacitor with high density cobalt nanodots floating gate and HfO2 blocking dielectric

2009 ◽  
Vol 95 (3) ◽  
pp. 033118 ◽  
Author(s):  
Yanli Pei ◽  
Chengkuan Yin ◽  
Toshiya Kojima ◽  
Masahiko Nishijima ◽  
Takafumi Fukushima ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Metal Oxide Semiconductor ◽  
High Density ◽  
Floating Gate ◽  
Oxide Semiconductor ◽  
Memory Characteristics ◽  
Metal Oxide Semiconductor Capacitor

Optimized Al-doped TiO2 gate insulator for metal-oxide-semiconductor capacitor on Ge substrate

2021 ◽  
Author(s):  
Dong Gun Kim ◽  
Cheol Hyun An ◽  
Sanghyeon Kim ◽  
Dae Seon Kwon ◽  
Junil Lim ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Leakage Current ◽  
Tio2 Film ◽  
Single Layer ◽  
Atomic Layer ◽  
Metal Oxide Semiconductor ◽  
Gate Insulator ◽  
Oxide Semiconductor ◽  
High K ◽  
Metal Oxide Semiconductor Capacitor

Atomic layer deposited TiO2- and Al2O3-based high-k gate insulator (GI) were examined for the Ge-based metal-oxide-semiconductor capacitor application. The single-layer TiO2 film showed a too high leakage current to be...

Effects of thermal and electrical stress on defect generation in InAs metal–oxide–semiconductor capacitor

2019 ◽  
Vol 467-468 ◽  
pp. 1161-1169 ◽  
Author(s):  
Min Baik ◽  
Hang-Kyu Kang ◽  
Yu-Seon Kang ◽  
Kwang-Sik Jeong ◽  
Changmin Lee ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Defect Generation ◽  
Electrical Stress ◽  
Metal Oxide Semiconductor Capacitor

Mechanism and CHARM2 Evaluation of P-Channel Metal Oxide Semiconductor Threshold Voltage Drop during High Density Plasma Heat-up Process

2009 ◽  
Vol 48 (8) ◽  
pp. 08HF02 ◽  
Author(s):  
Dong-Hwan Kim ◽  
Jeongyun Lee ◽  
Min-Sung Kim ◽  
Ken Tokashiki ◽  
Kyoungsub Shin ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Threshold Voltage ◽  
Voltage Drop ◽  
Metal Oxide Semiconductor ◽  
High Density ◽  
Oxide Semiconductor ◽  
Density Plasma

On the methodology of calculating volume charge density in a MIFGMOS substrate using Poisson’s equation

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Francisco Javier Plascencia Jauregui ◽  
Agustín Santiago Medina Vazquez ◽  
Edwin Christian Becerra Alvarez ◽  
José Manuel Arce Zavala ◽  
Sandra Fabiola Flores Ruiz
Keyword(s):  
Metal Oxide ◽  
Charge Density ◽  
Metal Oxide Semiconductor ◽  
Floating Gate ◽  
Poisson’S Equation ◽  
Oxide Semiconductor ◽  
Volume Charge ◽  
Poisson's Equation ◽  
Content Type ◽  
Volume Charge Density

Purpose This study aims to present a mathematical method based on Poisson’s equation to calculate the voltage and volume charge density formed in the substrate under the floating gate area of a multiple-input floating-gate metal-oxide semiconductor metal-oxide semiconductor (MOS) transistor. Design/methodology/approach Based on this method, the authors calculate electric fields and electric potentials from the charges generated when voltages are applied to the control gates (CG). This technique allows us to consider cases when the floating gate has any trapped charge generated during the manufacturing process. Moreover, the authors introduce a mathematical function to describe the potential behavior through the substrate. From the resultant electric field, the authors compute the volume charge density at different depths. Findings The authors generate some three-dimensional graphics to show the volume charge density behavior, which allows us to predict regions in which the volume charge density tends to increase. This will be determined by the voltages on terminals, which reveal the relationship between CG and volume charge density and will allow us to analyze some superior-order phenomena. Originality/value The procedure presented here and based on coordinates has not been reported before, and it is an aid to generate a model of the device and to build simulation tools in an analog design environment.

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