Preparation of integrated chemical sensors using commercial VLSI technology

1987 ◽  
Vol 65 (5) ◽  
pp. 1072-1078 ◽  
Author(s):  
Paul G. Glavina ◽  
D. Jed Harrison
Keyword(s):  
Chemical Sensors ◽  
Linear Response ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Microelectrode Arrays ◽  
Drain Current ◽  
Cyclic Voltammetric ◽  
Design Rules ◽  
Vlsi Technology ◽  
Commercial Technology

The fabrication of ion sensitive field effect transistors (ISFET) and microelectrode arrays for use as chemical sensors using a commercial CMOS fabrication process is described. The commercial technology is readily available through the Canadian Microelectronics Corporation; however, several of the recommended design rules must be ignored in preparing chemical sensors using this process. The ISFET devices show near theoretical response to K+ in aqueous solution (55 mV slope) when coated with a K+ sensitive membrane. An extended gate ion sensitive device is presented which offers advantages in encapsulation of ISFET sensors. The source-drain current of both devices show a linear response to log [Formula: see text] in contrast to ISFETs previously reported that have high internal lead resistances. Al and poly-Si microelectrode arrays are fabricated commercially and then Pt is electrodeposited on the microelectrodes. The resulting arrays show good cyclic voltammetric response to Fe(CN)64− and Ru(NH3)63+ and are relatively durable.

AlGaN/GaN Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistors (MOSHFETs) with the Delta-Doped Barrier Layer

2002 ◽  
Vol 743 ◽  
Author(s):  
Z. Y. Fan ◽  
J. Li ◽  
J. Y. Lin ◽  
H. X. Jiang ◽  
Y. Liu ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Cutoff Frequency ◽  
Drain Current ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Semiconductor Heterostructure ◽  
Heterostructure Field Effect Transistors ◽  
Gate Control

ABSTRACTThe fabrication and characterization of AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOSHFETs) with the δ-doped barrier are reported. The incorporation of the SiO2 insulated-gate and the δ-doped barrier into HFET structures reduces the gate leakage and improves the 2D channel carrier mobility. The device has a high drain-current-driving and gate-control capabilities as well as a very high gate-drain breakdown voltage of 200 V, a cutoff frequency of 15 GHz and a maximum frequency of oscillation of 34 GHz for a gate length of 1 μm. These characteristics indicate a great potential of this structure for high-power-microwave applications.

Temporal Changes in Source–Drain Current for Organic Field-Effect Transistors Caused by Dipole on Insulator Surface

2008 ◽  
Vol 1 ◽  
pp. 061801 ◽  
Author(s):  
Kouji Suemori ◽  
Misuzu Taniguchi ◽  
Sei Uemura ◽  
Manabu Yoshida ◽  
Satoshi Hoshino ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Temporal Changes ◽  
Organic Field Effect Transistors ◽  
Insulator Surface

Influence of work function variation of metal gates on fluctuation of sub-threshold drain current for fin field-effect transistors with undoped channels

2014 ◽  
Vol 53 (4S) ◽  
pp. 04EC11 ◽  
Author(s):  
Takashi Matsukawa ◽  
Yongxun Liu ◽  
Kazuhiko Endo ◽  
Junichi Tsukada ◽  
Hiromi Yamauchi ◽  
...  
Keyword(s):  
Work Function ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Metal Gates

scholarly journals Line-Edge Roughness from Extreme Ultraviolet Lithography to Fin-Field-Effect-Transistor: Computational Study

Micromachines ◽  
2021 ◽  
Vol 12 (12) ◽  
pp. 1493
Author(s):  
Sang-Kon Kim
Keyword(s):  
Field Effect ◽  
Extreme Ultraviolet ◽  
Field Effect Transistors ◽  
Computational Study ◽  
Drain Current ◽  
Extreme Ultraviolet Lithography ◽  
Line Edge Roughness ◽  
Stochastic Fluctuation ◽  
Ultraviolet Lithography ◽  
Edge Roughness

Although extreme ultraviolet lithography (EUVL) has potential to enable 5-nm half-pitch resolution in semiconductor manufacturing, it faces a number of persistent challenges. Line-edge roughness (LER) is one of critical issues that significantly affect critical dimension (CD) and device performance because LER does not scale along with feature size. For LER creation and impacts, better understanding of EUVL process mechanism and LER impacts on fin-field-effect-transistors (FinFETs) performance is important for the development of new resist materials and transistor structure. In this paper, for causes of LER, a modeling of EUVL processes with 5-nm pattern performance was introduced using Monte Carlo method by describing the stochastic fluctuation of exposure due to photon-shot noise and resist blur. LER impacts on FinFET performance were investigated using a compact device method. Electric potential and drain current with fin-width roughness (FWR) based on LER and line-width roughness (LWR) were fluctuated regularly and quantized as performance degradation of FinFETs.

High Performance Organic Field-Effect Transistors and Integrated Inverters

2001 ◽  
Vol 665 ◽  
Author(s):  
A. Ullmann ◽  
J. Ficker ◽  
W. Fix ◽  
H. Rost ◽  
W. Clemens ◽  
...  
Keyword(s):  
Field Effect ◽  
High Performance ◽  
Field Effect Transistors ◽  
Low Cost ◽  
Drain Current ◽  
Organic Field Effect Transistors ◽  
Metal Contacts ◽  
Gate Electrodes ◽  
Polymer Semiconductors ◽  
Set Up

ABSTRACTIntegrated plastic circuits (IPCs) will become an integral component of future low cost electronics. For low cost processes IPCs have to be made of all-polymer Transistors. We present our recent results on fabrication of Organic Field-Effect Transistors (OFETs) and integrated inverters. Top-gate transistors were fabricated using polymer semiconductors and insulators. The source-drain structures were defined by standard lithography of Au on a flexible plastic film, and on top of these electrodes, poly(3-alkylthiophene) (P3AT) as semiconductor, and poly(4-hydroxystyrene) (PHS) as insulator were homogeneously deposited by spin-coating. The gate electrodes consist of metal contacts. With this simple set-up, the transistors exhibit excellent electric performance with a high source-drain current at source - drain and gate voltages below 30V. The characteristics show very good saturation behaviour for low biases and are comparable to results published for precursor pentacene. With this setup we obtain a mobility of 0.2cm2/Vs for P3AT. Furthermore, we discuss organic integrated inverters exhibiting logic capability. All devices show shelf-lives of several months without encapsulation.

scholarly journals Design Rules for Memories Based on Graphene Ferroelectric Field-Effect Transistors

2019 ◽  
Vol 2 (1) ◽  
pp. 2-8 ◽  
Author(s):  
Morteza Hassanpour Amiri ◽  
Jonas Heidler ◽  
Klaus Müllen ◽  
Kamal Asadi
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Design Rules

An analytical drain current model for graphene nanoribbon tunnel field-effect transistors

2019 ◽  
Vol 58 (9) ◽  
pp. 095001
Author(s):  
Jiarui Bao ◽  
Shuyan Hu ◽  
Guangxi Hu ◽  
Laigui Hu ◽  
Ran Liu ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Current Model ◽  
Drain Current ◽  
Graphene Nanoribbon

Change in Characteristics of SiC MOSFETs by Gamma-Ray Irradiation at High Temperature

2016 ◽  
Vol 858 ◽  
pp. 860-863 ◽  
Author(s):  
Takuma Matsuda ◽  
Takashi Yokoseki ◽  
Satoshi Mitomo ◽  
Koichi Murata ◽  
Takahiro Makino ◽  
...  
Keyword(s):  
Field Effect ◽  
Gamma Ray ◽  
Field Effect Transistors ◽  
Absorbed Dose ◽  
Drain Current ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Radiation Response ◽  
Electrical Characteristics ◽  
Gamma Ray Irradiation

Radiation response of 4H-SiC vertical power Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) was investigated at 150°C up to 10.4 MGy. Until irradiation at 1.2 MGy, the drain current – gate voltage curves of the SiC MOSFETs shifted to the negative voltage side, and the leakage of drain current at gate voltages below threshold voltage increased with increasing absorbed dose. However, no significant change in the electrical characteristics of SiC MOSFETs was observed at doses above 1.2 MGy. For blocking characteristics, there were no degradations of the SiC MOSFETs irradiated at 150°C even after irradiated at 10.4 MGy.

scholarly journals Physical and Electrical Characteristics of Carbon Nanotube Network Field-Effect Transistors Synthesized by Alcohol Catalytic Chemical Vapor Deposition

2011 ◽  
Vol 2011 ◽  
pp. 1-7 ◽  
Author(s):  
Chin-Lung Cheng ◽  
Chien-Wei Liu ◽  
Bau-Tong Dai ◽  
Ming-Yen Lee
Keyword(s):  
Chemical Vapor Deposition ◽  
Carbon Nanotube ◽  
Vapor Deposition ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Chemical Vapor ◽  
Drain Current ◽  
Electrical Characteristics ◽  
Carbon Nanotube Network ◽  
Carbon Nanotube Networks

Carbon nanotubes (CNTs) have been explored in nanoelectronics to realize desirable device performances. Thus, carbon nanotube network field-effect transistors (CNTNFETs) have been developed directly by means of alcohol catalytic chemical vapor deposition (ACCVD) method using Co-Mo catalysts in this work. Various treated temperatures, growth time, and Co/Mo catalysts were employed to explore various surface morphologies of carbon nanotube networks (CNTNs) formed on the SiO2/n-type Si(100) stacked substrate. Experimental results show that most semiconducting single-walled carbon nanotube networks with 5–7 nm in diameter and low disorder-induced mode (D-band) were grown. A bipolar property of CNTNFETs synthesized by ACCVD and using HfO2as top-gate dielectric was demonstrated. Various electrical characteristics, including drain current versus drain voltage(Id-Vd), drain current versus gate voltage(Id-Vg), mobility, subthreshold slope (SS), and transconductance(Gm), were obtained.

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