scholarly journals Revisiting Hypergraph Models for Sparse Matrix Partitioning

SIAM Review ◽  
2007 ◽  
Vol 49 (4) ◽  
pp. 595-603 ◽  
Author(s):  
Bora Uçar ◽  
Cevdet Aykanat
Keyword(s):  
Sparse Matrix ◽  
Matrix Partitioning

scholarly journals Sparse matrix partitioning for optimizing SpMV on CPU-GPU heterogeneous platforms

2019 ◽  
Vol 34 (1) ◽  
pp. 66-80 ◽  
Author(s):  
Akrem Benatia ◽  
Weixing Ji ◽  
Yizhuo Wang ◽  
Feng Shi
Keyword(s):  
Graphics Processing Units ◽  
Sparse Matrix ◽  
Sparse Matrices ◽  
Heterogeneous Systems ◽  
Input Matrix ◽  
Heterogeneous Platforms ◽  
Mapping Algorithm ◽  
Matrix Vector Multiplication ◽  
Graphics Processing ◽  
Matrix Partitioning

Sparse matrix–vector multiplication (SpMV) kernel dominates the computing cost in numerous applications. Most of the existing studies dedicated to improving this kernel have been targeting just one type of processing units, mainly multicore CPUs or graphics processing units (GPUs), and have not explored the potential of the recent, rapidly emerging, CPU-GPU heterogeneous platforms. To take full advantage of these heterogeneous systems, the input sparse matrix has to be partitioned on different available processing units. The partitioning problem is more challenging with the existence of many sparse formats whose performances depend both on the sparsity of the input matrix and the used hardware. Thus, the best performance does not only depend on how to partition the input sparse matrix but also on which sparse format to use for each partition. To address this challenge, we propose in this article a new CPU-GPU heterogeneous method for computing the SpMV kernel that combines between different sparse formats to achieve better performance and better utilization of CPU-GPU heterogeneous platforms. The proposed solution horizontally partitions the input matrix into multiple block-rows and predicts their best sparse formats using machine learning-based performance models. A mapping algorithm is then used to assign the block-rows to the CPU and GPU(s) available in the system. Our experimental results using real-world large unstructured sparse matrices on two different machines show a noticeable performance improvement.

scholarly journals Optimizing nonzero-based sparse matrix partitioning models via reducing latency

2018 ◽  
Vol 122 ◽  
pp. 145-158 ◽  
Author(s):  
Seher Acer ◽  
Oguz Selvitopi ◽  
Cevdet Aykanat
Keyword(s):  
Sparse Matrix ◽  
Matrix Partitioning

A parallel direct method circuit simulator based on sparse matrix partitioning

1998 ◽  
Vol 24 (6) ◽  
pp. 385-404
Author(s):  
K.Y. Wu ◽  
P.K.H. Ng ◽  
X.D. Jia ◽  
R.M.M. Chen ◽  
A.M. Layfield
Keyword(s):  
Sparse Matrix ◽  
Direct Method ◽  
Circuit Simulator ◽  
Matrix Partitioning

scholarly journals Reducing latency cost in 2D sparse matrix partitioning models

2016 ◽  
Vol 57 ◽  
pp. 1-24 ◽  
Author(s):  
Oguz Selvitopi ◽  
Cevdet Aykanat
Keyword(s):  
Sparse Matrix ◽  
Matrix Partitioning

Two-Dimensional Approaches to Sparse Matrix Partitioning

2012 ◽  
pp. 321-349 ◽  
Author(s):  
Rob Bisseling ◽  
Bas Auer ◽  
A Yzelman ◽  
Tristan van Leeuwen ◽  
Ümit Çatalyürek
Keyword(s):  
Sparse Matrix ◽  
Two Dimensional ◽  
Matrix Partitioning
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