Wireless communication standard continues to evolve in order to fulfill the demand for high data rate operation. This leads to the exertion on the design of radio frequency power amplifier (RFPA) which consumes high DC power in order to support linear transmission of high data rate signal. Hence, operating the PA with low DC power consumption without trading-off the linearity is vital in order to achieve the goal of achieving fully integrated system-on-chip (SoC) solution for 4G and 5G transceivers. In this paper, the evolution of CMOS PA toward achieving a fully integrated transceiver solution is discussed through the review of multifarious CMOS PA design. This is categorized into the review of efficiency enhancement designs followed by linearity enhancement designs of the CMOS PA.
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