Simulation-based high-level synthesis of Nyquist-rate data converters using MATLAB/SIMULINK

Mapping Intimacies ◽

10.1117/12.607832 ◽

2005 ◽

Author(s):

Jesus Ruiz-Amaya ◽

Jose M. de la Rosa ◽

Manuel Delgado-Restituto ◽

Angel Rodriguez-Vazquez

Keyword(s):

Data Converters ◽

High Level Synthesis ◽

Rate Data ◽

Matlab Simulink ◽

Simulation Based ◽

Nyquist Rate ◽

High Level

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A Matlab/SIMULINK toolbox for the simulation-based high-level synthesis of Nyquist-rate data converters-application to a pure digital 0.13 μm CMOS 12-bit@80 MS/s analog front-end for PLC/VDSL

5th IEE International Conference on ADDA 2005. Advanced A/D and D/A Conversion Techniques and their Applications ◽

10.1049/cp:20050144 ◽

2005 ◽

Cited By ~ 1

Author(s):

J. Ruiz-Amaya

Keyword(s):

Data Converters ◽

High Level Synthesis ◽

Rate Data ◽

Matlab Simulink ◽

Front End ◽

Analog Front End ◽

Simulation Based ◽

Nyquist Rate ◽

High Level

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MATLAB/SIMULINK-based high-level synthesis of discrete-time and continuous-time ΣΔ modulators

Proceedings Design, Automation and Test in Europe Conference and Exhibition ◽

10.1109/date.2004.1269222 ◽

2004 ◽

Cited By ~ 5

Author(s):

J. Ruiz-Amaya ◽

J.M. de la Rosa ◽

F. Medeiro ◽

F.V. Fernandez ◽

R. del Rio ◽

...

Keyword(s):

Discrete Time ◽

Continuous Time ◽

High Level Synthesis ◽

Matlab Simulink ◽

High Level

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DAISY: a simulation-based high-level synthesis tool for ΔΣ modulators

IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140) ◽

10.1109/iccad.2000.896472 ◽

2002 ◽

Cited By ~ 12

Author(s):

K. Francken ◽

P. Vancorenland ◽

G. Gielen

Keyword(s):

High Level Synthesis ◽

Simulation Based ◽

Synthesis Tool ◽

High Level

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CLANS: a high-level synthesis tool for high resolution data converters

[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers ◽

10.1109/iccad.1988.122557 ◽

2003 ◽

Cited By ~ 21

Author(s):

J.G. Kenney ◽

L.R. Carley

Keyword(s):

High Resolution ◽

Data Converters ◽

High Level Synthesis ◽

High Resolution Data ◽

Synthesis Tool ◽

High Level ◽

Resolution Data

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Nyquist-Rate Data Converters for Signal Conversion

Analog Circuit Design for Communication SOC ◽

10.2174/978160805037611201010153 ◽

2012 ◽

pp. 153-183

Keyword(s):

Data Converters ◽

Rate Data ◽

Signal Conversion ◽

Nyquist Rate

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Simulation-based verification for high-level synthesis

IEEE Design & Test of Computers ◽

10.1109/54.75659 ◽

1991 ◽

Vol 8 (1) ◽

pp. 14-20 ◽

Cited By ~ 13

Author(s):

R. Ernst ◽

J. Bhasker

Keyword(s):

High Level Synthesis ◽

Simulation Based ◽

High Level

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An optimization-based tool for the high-level synthesis of discrete-time and continuous-time ΣΔ modulators in the Matlab/Simulink environment

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) ◽

10.1109/iscas.2004.1329467 ◽

2004 ◽

Cited By ~ 4

Author(s):

J. Ruiz-Amaya ◽

J.M. de la Rosa ◽

F. Medeiro ◽

F.V. Fernandez ◽

R. del Rio ◽

...

Keyword(s):

Discrete Time ◽

Continuous Time ◽

High Level Synthesis ◽

Matlab Simulink ◽

High Level

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Floorplan-Aware High-Level Synthesis for Generalized Distributed-Register Architectures

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e92.a.3169 ◽

2009 ◽

Vol E92-A (12) ◽

pp. 3169-3179 ◽

Cited By ~ 7

Author(s):

Akira OHCHI ◽

Nozomu TOGAWA ◽

Masao YANAGISAWA ◽

Tatsuo OHTSUKI

Keyword(s):

High Level Synthesis ◽

High Level

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A Floorplan Aware High-Level Synthesis Algorithm with Body Biasing for Delay Variation Compensation

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e100.a.1439 ◽

2017 ◽

Vol E100.A (7) ◽

pp. 1439-1451

Author(s):

Koki IGAWA ◽

Masao YANAGISAWA ◽

Nozomu TOGAWA

Keyword(s):

High Level Synthesis ◽

Synthesis Algorithm ◽

Body Biasing ◽

High Level ◽

Delay Variation

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Nested Loop Parallelization Using Polyhedral Optimization in High-Level Synthesis

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e97.a.2498 ◽

2014 ◽

Vol E97.A (12) ◽

pp. 2498-2506

Author(s):

Akihiro SUDA ◽

Hideki TAKASE ◽

Kazuyoshi TAKAGI ◽

Naofumi TAKAGI

Keyword(s):

High Level Synthesis ◽

Loop Parallelization ◽

Polyhedral Optimization ◽

High Level ◽

Nested Loop

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