A 1-GHz differential second-order low-pass sigma-delta modulator in CMOS for wireless receivers

2004 ◽  
Author(s):  
Yingbo Zhu ◽  
Said F. Al-Sarawi ◽  
Michael Liebelt
2004 ◽  
Vol 1 (3) ◽  
pp. 37-44 ◽  
Author(s):  
Dragisa Milovanovic ◽  
Milan Savic ◽  
Miljan Nikolic

As a part of wider project sigma-delta modulator was designed. It represents an A/D part of a power meter IC. Requirements imposed were: SNDR and dynamic range > 50 dB for maximum input swing of 250 mV differential at 50 Hz. Over sampling ratio is 128 with clock frequency of 524288 Hz which gives bandwidth of 2048 Hz. Circuit is designed in 3.3 V supply standard CMOS 0.35 ?m technology.


2014 ◽  
Vol 18 (2) ◽  
pp. 263-271
Author(s):  
Chulkyu Park ◽  
Kichang Jang ◽  
Hyojae Kim ◽  
Joongho Choi

Author(s):  
Rochelle Marie F. Amistoso ◽  
Michael Joe A. Bautista ◽  
Rafael Karlo D.P. Delos Santos ◽  
Joana Rochelle R. Ortiz ◽  
Louis P. Alarcon ◽  
...  

2004 ◽  
Vol 39 (1) ◽  
pp. 81-87 ◽  
Author(s):  
Mourad Loulou ◽  
Dominique Dallet ◽  
Nouri Masmoudi ◽  
Philippe Marchegay ◽  
Lotfi Kamoun

2010 ◽  
Vol 45 (9) ◽  
pp. 1795-1808 ◽  
Author(s):  
Cho-Ying Lu ◽  
Marvin Onabajo ◽  
Venkata Gadde ◽  
Yung-Chung Lo ◽  
Hsien-Pu Chen ◽  
...  

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