Optimization of side gate length and side gate voltage for sub-100-nm double-gate MOSFET

2002 ◽  
Author(s):  
Jae-hong Kim ◽  
Geun-ho Kim ◽  
Suk-woong Ko ◽  
Hak-kee Jung
Keyword(s):  
Gate Voltage ◽  
Gate Length ◽  
Double Gate ◽  
Double Gate Mosfet

Integration Challenges for Double-Gate MOSFET Technologies

2001 ◽  
Vol 686 ◽  
Author(s):  
W.P. Maszara
Keyword(s):  
Cross Section ◽  
Wafer Bonding ◽  
Process Integration ◽  
Device Modeling ◽  
Gate Length ◽  
Double Gate ◽  
Fully Depleted ◽  
Lateral Tunnel ◽  
Double Gate Mosfet ◽  
Modeling Data

AbstractDevice modeling data and some early experiments suggests that fully depleted MOSFET devices where channel is controlled by two opposing gates or one gate that surrounds most or the entire channel, will provide better scaling than the classic devices with one gate on one side of the channel. However, formation of such devices requires complex, non-conventional and sometimes exotic geometry and processing, ranging from wafer bonding to selective lateral ‘tunnel’ epitaxy, to selectively wet-etched channels with triangular cross-section. Classic single-gate transistors have been recently demonstrated with reasonable performance at 20-15 nm of physical gate length. Double-gate transistors with their process integration complexity will likely become a viable alternative for smaller geometries. This paper will discuss various approaches to realization of those multi-gate fully depleted devices and their process integration challenges for sub-15 nm gates.

Comparisons between Dual and Tri Material Gate on a 32 nm Double Gate MOSFET

NANO ◽  
2016 ◽  
Vol 11 (10) ◽  
pp. 1650117 ◽  
Author(s):  
Arpan Dasgupta ◽  
Rahul Das ◽  
Shramana Chakraborty ◽  
Arka Dutta ◽  
Atanu Kundu ◽  
...  
Keyword(s):  
Drain Current ◽  
Current Gain ◽  
Gate Length ◽  
Double Gate ◽  
Transport Delay ◽  
Double Gate Mosfet ◽  
Rf Performance ◽  
Dual Material ◽  
Analog Parameters ◽  
Intrinsic Gain

The paper reports a comparative analysis between the dual material gate double gate (DMG-DG) nMOSFET and the tri material gate double gate (TMG-DG) nMOSFET in terms of their analog and RF performance. Three different devices having the DMG-DG structure have been considered. Each of the devices have different higher workfunction material gate length (L1) to lower workfunction material gate length (L2) ratio (L1:L2). Along with the three devices, the performance of the TMG-DG nMOSFET is compared. The analog parameters considered for the comparison are the drain current ([Formula: see text]), the transconductance ([Formula: see text]), the transconductance generation factor ([Formula: see text]/[Formula: see text]) and the intrinsic gain ([Formula: see text]Ro). The drain induced barrier lowering (DIBL) of the devices is compared. The RF analysis is performed using the non quasi static (NQS) approach. We consider the intrinsic gate to source capacitances ([Formula: see text]), the intrinsic gate to drain capacitance ([Formula: see text]), the intrinsic gate to source resistances ([Formula: see text]), the intrinsic gate to drain resistance ([Formula: see text]), the transport delay ([Formula: see text]), the unity current gain cut-off frequency ([Formula: see text]) and the max frequency of oscillation ([Formula: see text]) for the RF comparisons. A single stage amplifier is also implemented using the devices for a circuit comparison.

Effect of Underlap with Fixed Gate Length: GaN-Based Double-Gate MOSFETs

2021 ◽  
Author(s):  
Md. Rokib Hasan ◽  
Md. Rabiul Islam ◽  
Tanjim Masroor Bhuiyan ◽  
Muhib Ashraf Nibir ◽  
Md. Emran Hasan ◽  
...  
Keyword(s):  
Gate Length ◽  
Double Gate
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