Capacitive humidity sensor in CMOS technology

2001 ◽  
Author(s):  
Xian-Wei Yan ◽  
Ming Qin ◽  
Qing-An Huang
Keyword(s):  
Humidity Sensor ◽  
Cmos Technology ◽  
Capacitive Humidity Sensor

A Low-Cost Low-Power Capacitive Humidity Sensor in CMOS Technology

2014 ◽  
Vol 556-562 ◽  
pp. 1842-1846
Author(s):  
Fang Ming Deng ◽  
Yi Gang He
Keyword(s):  
Humidity Sensor ◽  
Supply Voltage ◽  
Low Cost ◽  
Cmos Technology ◽  
Cmos Process ◽  
Sensing Element ◽  
Digital Conversion ◽  
Sensor Interface ◽  
Delta Sigma ◽  
Capacitive Humidity Sensor

This paper presents a capacitive humidity sensor in CMOS technology. The humidity sensor element is implemented in standard CMOS technology without any further post-processing, which results in low fabrication cost. The sensor interface is based on a delta-sigma converter and can be easily reconfigured to compensate for process variation of the sensing element. The proposed humidity sensor is fabricated in 0.16μm standard CMOS process and the chip occupies 0.25mm2. The measurement result shows that this humidity sensor acquires a resolution of 0.1%RH in the range of 20%RH to 90%RH. The interface achieves a 12.5-bits capacitance-to-digital conversion and consumes only 9.6μW power at 1.2V supply voltage.

A capacitive humidity sensor based on CMOS technology with adsorbing film

1988 ◽  
Vol 15 (4) ◽  
pp. 325-335 ◽  
Author(s):  
M. Parameswaran ◽  
H.P. Baltes ◽  
M.J. Brett ◽  
D.E. Fraser ◽  
A.M. Robinson
Keyword(s):  
Humidity Sensor ◽  
Cmos Technology ◽  
Capacitive Humidity Sensor

A Capacitive Humidity Sensor for Low-Cost Low-Power Application

2014 ◽  
Vol 556-562 ◽  
pp. 1847-1851
Author(s):  
Xiang Wu ◽  
Fang Ming Deng
Keyword(s):  
Humidity Sensor ◽  
Supply Voltage ◽  
Low Cost ◽  
Cmos Technology ◽  
Cmos Process ◽  
Sensor Interface ◽  
Interface Circuit ◽  
Digital Architecture ◽  
Power Application ◽  
Capacitive Humidity Sensor

This paper presents a capacitive humidity sensor in CMOS technology. The humidity sensor element is implemented in standard CMOS technology without any further post-processing, which results in low fabrication cost. The sensor interface employs a fully-digital architecture based on phase locked loop, which results in low pow dissipation. The proposed humidity sensor is fabricated in TSMC 0.18μm CMOS process and the chip occupies an area of 0.05mm2. The measurement result shows that the sensor value exhibits good linearity within the range of 10-90%RH and the interface circuit consumes only 1.05μW at 0.5V supply voltage.

High-performance capacitive humidity sensor based on silicon nanoporous pillar array

2008 ◽  
Vol 517 (2) ◽  
pp. 948-951 ◽  
Author(s):  
Long Yu Li ◽  
Yong Fen Dong ◽  
Wei Fen Jiang ◽  
Hui Fang Ji ◽  
Xin Jian Li
Keyword(s):  
High Performance ◽  
Humidity Sensor ◽  
Pillar Array ◽  
Capacitive Humidity Sensor
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