High speed data access algorithm for automatic weather station NAND flash extended storage based on STM32

Author(s):  
Qinqiang Zhou ◽  
Liang Zhang ◽  
Lihong Luo ◽  
Yanzhong Liu
2014 ◽  
Vol 912-914 ◽  
pp. 1556-1560
Author(s):  
Sheng Kun Li ◽  
Cheng Qun Chu ◽  
Hai Liang Chen ◽  
Fang Ma

The large-capacity, high-speed and low power consumption become the new requirements for the data storage systems. In this paper, a high-performance storage module based on multiple NAND flash memory chips is presented to real-time massive data acquisition system. In order to achieve the miniaturization dimension and the high-speed data storage design requirements, the paper presents a small size and high-speed storage unit based on NAND flash, where the dimensions of the module can reach 33mm×33mm and the maximum rate is up to 60MB/s. Ensuring continuous and reliable operation requires a dedicated buffering for the data transmission. We analyze the elements and peculiarities of the flash memory chip and propose a multi-way architecture to speed up data access. The design of a multilevel high-speed buffer structure based on the field programmable gate array (FPGA) technology is introduced in the paper. The proposed system can be applicable to some portable digital equipment.


2013 ◽  
Vol 367 ◽  
pp. 541-543
Author(s):  
Yun Peng Li

This article focuses on research and implementation of a kind of solid storage system that is based on NAND flash which can store the data with high speed and huge capacity. A design with quad 1.25Gsps ADC and flash storage array with 1TB is demonstrated in the paper. The design is applied widely in many fields such as radar, communication and speech recognition. The detail of hardware development is also introduced in the thesis. In addition, a method is discussed to approve the reading and writing bandwidth by parallel operations on multiple pieces of flash. By using the method, the data bandwidth is arrived 6GB/S.


2014 ◽  
Vol 912-914 ◽  
pp. 1222-1227 ◽  
Author(s):  
Cheng Qun Chu ◽  
Yong Feng Ren ◽  
Fang Ma

The needs of large-capacity storage in high-speed image acquisition systems require the design of reliable and efficient storage instruments. The paper presents a FPGA-based high-speed storage instrument for high speed Camera Link image acquisition system. The FPGA processes the input data and stores the results into the storage array. Multi-chip large-capacity SLC NAND Flash chips constitute a storage array, with up to 100MByte/s storage rate, is used for the digitization image signals. A multilevel high-speed buffer structure based on abundant internal block RAM resources in FPGA is used for speeding up data access. At the same time, it can take advantage of FPGA constructing the corresponding VGA timing signals to control the video conversion chip ADV7123 to realize the function of real-time display. After a description of the proposed hardware and solutions, an experimental was built to test the performance. The results have shown that the FPGA-based acquisition system is a compact and flexible solution for high-speed image acquisition applications.


2012 ◽  
Vol 182-183 ◽  
pp. 706-710 ◽  
Author(s):  
Cheng Jun Zhang ◽  
Xiao Yan Zuo ◽  
Chi Zhang ◽  
Xiao Guang Wu

Through analyzing the pattern data of computerized jacquard knitting wrap machine, comparing the current storages structure and type, this paper introduces a method for Flash file structure of jacquard data. The method takes advantage of ARM chip to achieve the operations for access and modification of Flash, designing a management procedures of jacquard data access from the perspective of increasing the Flash life. The management procedures not only complete read and write operations, but also meet the requirement of jacquard high-speed data transfer.


2013 ◽  
Vol 333-335 ◽  
pp. 452-459 ◽  
Author(s):  
Ming Yu Zhou ◽  
Xuan Zhou ◽  
Guang Yu Zheng ◽  
Shu Sheng Peng

In this paper, a high-speed data acquisition system based on FPGA is introduced, which has three different channels with one 5Msps sampling rate and 3×256Mb NAND FLASH. This system is controlled by a large scale FPGA chip from Xilinx Inc., XC3S500E-4FG320C. The collected data are first stored in nonvolatile flash on this fuse in-orbit and imported into a USB disk after down-falling. The main hardware and software design of each module are introduced in detail. Experiment results are shown in the final chapter.


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