Parallel compression/decompression-based datapath architecture for multibeam mask writers

A run-time reconfigurable datapath architecture for image processing applications

Proceedings Design, Automation and Test in Europe Conference and Exhibition ◽

10.1109/date.2004.1269237 ◽

2004 ◽

Cited By ~ 1

Author(s):

M.R. Boschetti ◽

I.S. Silva ◽

S. Bampi

Keyword(s):

Image Processing ◽

Run Time ◽

Datapath Architecture

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Datapath architecture and technology for large scale ATM switching systems

Proceedings of GLOBECOM'96. 1996 IEEE Global Telecommunications Conference ◽

10.1109/glocom.1996.587675 ◽

2002 ◽

Cited By ~ 4

Author(s):

A. Takase ◽

T. Kozaki ◽

M. Takatori ◽

H. Abe

Keyword(s):

Large Scale ◽

Switching Systems ◽

Datapath Architecture

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Placement for the Reconfigurable Datapath Architecture

2005 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2005.1464977 ◽

2005 ◽

Author(s):

Yen-Tai Lai ◽

Hsin-Ya Lai ◽

Chia-Nan Yeh

Keyword(s):

Datapath Architecture

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Design Space Exploration of Datapath (Architecture) in High-Level Synthesis for Computation Intensive Applications

Application of Evolutionary Algorithms for Multi-objective Optimization in VLSI and Embedded Systems ◽

10.1007/978-81-322-1958-3_6 ◽

2014 ◽

pp. 93-111 ◽

Cited By ~ 1

Author(s):

Anirban Sengupta

Keyword(s):

Design Space Exploration ◽

Design Space ◽

Space Exploration ◽

High Level Synthesis ◽

High Level ◽

Datapath Architecture

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Low Power Datapath Architecture for Multiply - Accumulate (MAC) Unit

2019 4th International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT) ◽

10.1109/rteict46194.2019.9016717 ◽

2019 ◽

Author(s):

H R Spoorthi ◽

C P Narendra ◽

U Chandra Mohan

Keyword(s):

Low Power ◽

Datapath Architecture

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An ultra low power, realtime MPEG2 MP@HL motion estimation processor core with SIMD datapath architecture optimized for gradient descent search algorithm

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285) ◽

10.1109/cicc.2002.1012790 ◽

2003 ◽

Cited By ~ 3

Author(s):

M. Miyama ◽

O. Tooyama ◽

N. Takamatsu ◽

T. Kodake ◽

K. Nakamura ◽

...

Keyword(s):

Motion Estimation ◽

Low Power ◽

Gradient Descent ◽

Search Algorithm ◽

Ultra Low Power ◽

Processor Core ◽

Datapath Architecture

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Matrix datapath architecture for an iterative 4x4 MIMO noise whitening algorithm

Proceedings of the 13th ACM Great Lakes Symposium on VLSI - GLSVLSI '03 ◽

10.1145/764808.764848 ◽

2003 ◽

Cited By ~ 2

Author(s):

Geoff Knagge ◽

David Garrett ◽

Sivarama Venkatesan ◽

Chris Nicol

Keyword(s):

Datapath Architecture

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A datapath synthesis system for the reconfigurable datapath architecture

Proceedings of the 1995 conference on Asia Pacific design automation (CD-ROM) - ASP-DAC '95 ◽

10.1145/224818.224959 ◽

1995 ◽

Cited By ~ 25

Author(s):

Reiner W. Hartenstein ◽

Rainer Kress

Keyword(s):

Synthesis System ◽

Datapath Architecture

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A datapath synthesis system for the reconfigurable datapath architecture

Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95 ◽

10.1109/aspdac.1995.486359 ◽

2002 ◽

Cited By ~ 16

Author(s):

R.W. Hartenstein ◽

R. Kress

Keyword(s):

Synthesis System ◽

Datapath Architecture

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