Comparison of binary and multi-level logic electronics for embedded systems

2016 ◽  
Author(s):  
Shirly M. Damti ◽  
Steve E. Watkins ◽  
R. Joe Stanley
Keyword(s):  
Embedded Systems ◽  
Multi Level

Multi-level modeling of wireless embedded systems

2014 ◽  
Author(s):  
Fangyan Li ◽  
Eric Dekneuvel ◽  
Gilles Jacquemod ◽  
Davide Quaglia ◽  
Michele Lora ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Multi Level

Synthesis and exploration of multi-level, multi-perspective architectures of automotive embedded systems

2017 ◽  
Vol 18 (1) ◽  
pp. 739-767 ◽  
Author(s):  
Jordan A. Ross ◽  
Alexandr Murashkin ◽  
Jia Hui Liang ◽  
Michał Antkiewicz ◽  
Krzysztof Czarnecki
Keyword(s):  
Embedded Systems ◽  
Multi Level

Behavior-aware cache hierarchy optimization for low-power multi-core embedded systems

2017 ◽  
Vol 31 (19-21) ◽  
pp. 1740067
Author(s):  
Huatao Zhao ◽  
Xiao Luo ◽  
Chen Zhu ◽  
Takahiro Watanabe ◽  
Tianbo Zhu
Keyword(s):  
Energy Consumption ◽  
Embedded Systems ◽  
Core System ◽  
Cache Hierarchy ◽  
Cache Hierarchies ◽  
Data Throughput ◽  
Low Energy Consumption ◽  
Multi Level ◽  
Cache Allocation ◽  
Wasted Energy

In modern embedded systems, the increasing number of cores requires efficient cache hierarchies to ensure data throughput, but such cache hierarchies are restricted by their tumid size and interference accesses which leads to both performance degradation and wasted energy. In this paper, we firstly propose a behavior-aware cache hierarchy (BACH) which can optimally allocate the multi-level cache resources to many cores and highly improved the efficiency of cache hierarchy, resulting in low energy consumption. The BACH takes full advantage of the explored application behaviors and runtime cache resource demands as the cache allocation bases, so that we can optimally configure the cache hierarchy to meet the runtime demand. The BACH was implemented on the GEM5 simulator. The experimental results show that energy consumption of a three-level cache hierarchy can be saved from 5.29% up to 27.94% compared with other key approaches while the performance of the multi-core system even has a slight improvement counting in hardware overhead.

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