Exploration of maximum count rate capabilities for large-area photon counting arrays based on polycrystalline silicon thin-film transistors

2016 ◽  
Author(s):  
Albert K. Liang ◽  
Martin Koniczek ◽  
Larry E. Antonuk ◽  
Youcef El-Mohri ◽  
Qihua Zhao
Keyword(s):  
Thin Film ◽  
Count Rate ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Photon Counting ◽  
Large Area ◽  
Silicon Thin Film

Low-Temperature Polycrystalline Silicon Thin-Film Transistors for Large-Area Liquid Crystal Display

1992 ◽  
Vol 31 (Part 1, No. 12B) ◽  
pp. 4559-4562 ◽  
Author(s):  
Yutaka Miyata ◽  
Mamoru Furuta ◽  
Tatsuo Yoshioka ◽  
Tetsuya Kawamura
Keyword(s):  
Thin Film ◽  
Liquid Crystal ◽  
Low Temperature ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Liquid Crystal Display ◽  
Large Area ◽  
Silicon Thin Film

scholarly journals Technology, performance and degradation characteristics of SLS ELA thin film transistors

2013 ◽  
Vol 26 (3) ◽  
pp. 247-280
Author(s):  
Despina Moschou ◽  
Dimitrios Kouvatsos ◽  
Giannis Kontogiannopoulos ◽  
Filippos Farmakis ◽  
Apostolos Voutsas
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
High Performance ◽  
Flat Panel Displays ◽  
Technological Parameters ◽  
Large Area ◽  
Silicon Thin Film

Low temperature polycrystalline silicon thin film transistors (LTPS poly-Si TFTs) are essential for large area electronics and high performance flat panel displays. In recent years, LTPS TFT performance has substantially increased due to the important breakthroughs in the field of polycrystalline silicon crystallization and also due to the optimization of the process steps that differ from those of typical MOSFETs, mainly because of the requirement for low temperature procedures. In this review we present the electrical characteristics of polycrystalline silicon TFTs, crystallized with different variations of the advanced SLS ELA technique, and the determination of process technological parameters that affect the device performance, in order to further optimize the production of such high performance transistors, in terms of poly-Si microstructure, channel dimensions and topology. Also, the effect of these fabrication parameters on device degradation characteristics is studied, with an attempt to model and predict degradation characteristics.

Threshold voltage of excimer-laser-annealed polycrystalline silicon thin-film transistors

2000 ◽  
Vol 76 (17) ◽  
pp. 2442-2444 ◽  
Author(s):  
C. T. Angelis ◽  
C. A. Dimitriadis ◽  
F. V. Farmakis ◽  
J. Brini ◽  
G. Kamarinos ◽  
...  
Keyword(s):  
Thin Film ◽  
Excimer Laser ◽  
Threshold Voltage ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Silicon Thin Film

Dynamic-Gate-Stress-Induced Degradation in Bridged-Grain Polycrystalline Silicon Thin-Film Transistors

2016 ◽  
Vol 63 (10) ◽  
pp. 3964-3970 ◽  
Author(s):  
Meng Zhang ◽  
Zhihe Xia ◽  
Wei Zhou ◽  
Rongsheng Chen ◽  
Man Wong ◽  
...  
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Silicon Thin Film

Two‐step annealed polycrystalline silicon thin‐film transistors

1996 ◽  
Vol 80 (3) ◽  
pp. 1883-1890 ◽  
Author(s):  
Kwon‐Young Choi ◽  
Min‐Koo Han
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Silicon Thin Film

Reliability of Low Temperature Polycrystalline Silicon Thin-Film Transistors with Ultrathin Gate Oxide

2007 ◽  
Vol 46 (7A) ◽  
pp. 4021-4027 ◽  
Author(s):  
Hitoshi Ueno ◽  
Yuta Sugawara ◽  
Hiroshi Yano ◽  
Tomoaki Hatayama ◽  
Yukiharu Uraoka ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Gate Oxide ◽  
Silicon Thin Film
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