State-of-the-art silicon carbide optical telescope assembly for the JMAPS mission

2013 ◽  
Author(s):  
Dan Catropa ◽  
Farsh Azad
Keyword(s):  
Silicon Carbide ◽  
State Of The Art ◽  
Optical Telescope

Ablation Free Dicing of 4H-SiC Wafers with Feed Rates up to 200 mm/s by Using Thermal Laser Separation

2012 ◽  
Vol 1433 ◽  
Author(s):  
Dirk Lewke ◽  
Matthias Koitzsch ◽  
Martin Schellenberger ◽  
Lothar Pfitzner ◽  
Heiner Ryssel ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
State Of The Art ◽  
Separation Process ◽  
Back Side ◽  
Current State ◽  
Edge Quality ◽  
First Time ◽  
Metal Layers ◽  
Laser Separation ◽  
Street Width

ABSTRACTThis paper presents Thermal Laser Separation (TLS) as a novel dicing technology for silicon carbide (SiC) wafers. Results of this work will play an important role in improving the SiC dicing process regarding throughput and edge quality. TLS process parameters were developed for separating 4H-SiC wafers. Separated SiC dies were analyzed and compared with results produced with current state of the art blade dicing technology. For the first time, fully processed 100 mm 4H-SiC wafers with a thickness of 450 μm, including epi-layer and back side metal layers, could be separated with feed rates up to 200 mm/s. Besides the vastly improved dicing speed, the TLS separation process results in two important features of the separated SiC devices: First, edges are free of chipping and therefore of higher quality than the edges produced by blade dicing. Second, the TLS process is kerf free, which allows for reducing the necessary dicing street width and hence increasing the number of devices per wafer.

Electrochemical Formation of Porous Silicon Carbide for Micro-Device Applications

2018 ◽  
Vol 924 ◽  
pp. 943-946
Author(s):  
Gael Gautier ◽  
Thomas Defforge ◽  
Guillaume Gommé ◽  
Damien Valente ◽  
Daniel Alquier
Keyword(s):  
Silicon Carbide ◽  
Porous Silicon ◽  
Hydrofluoric Acid ◽  
Chemical Etching ◽  
State Of The Art ◽  
Electrolyte Composition ◽  
Substrate Properties ◽  
Device Applications ◽  
Porous Sic ◽  
Doping Type

Anodization of silicon carbide (SiC) in hydrofluoric acid (HF) solutions is a promising way to etch this material which is very resistant against traditional chemical etching methods. Moreover, it has been shown that several reproducible porous SiC morphologies can be performed varying anodization conditions (current density, electrolyte composition, UV lighting) and/or substrate properties (doping type and level). This paper proposes a state of the art of porous SiC etching in GREMAN and a presentation of the morphologies achievable using anodization in HF based electrolytes.

470 Celsius Packaging System for Silicon Carbide Electronics

2021 ◽  
Vol 2021 (HiTEC) ◽  
pp. 000083-000088
Author(s):  
N. Chiolino ◽  
A. M. Francis ◽  
J. Holmes ◽  
M. Barlow ◽  
C. Perkowski
Keyword(s):  
Silicon Carbide ◽  
High Temperature ◽  
Additive Manufacturing ◽  
State Of The Art ◽  
Stepper Motor ◽  
Design Rule ◽  
Design Environment ◽  
Packaging System ◽  
Standard Design ◽  
Packaging Strategy

Abstract High temperature Silicon Carbide (SiC) integrated circuit (IC) processes have enabled devices that operate at >450°C for more than a year. These results have established the need for more advanced and practical packaging strategies. Off the shelf state of the art packages cannot withstand the same high temperatures as the semiconductor can for long periods of time. Packaging SiC die to survive temperatures >450°C, while also maintaining a reasonable packaging strategy that is agile, rapid, and modular, presents new challenges. Presented is a technique for packaging SiC die with a focus on additive manufacturing, modular design scaling, and rugged survivability. This packaging strategy utilizes state of the art Additive Manufacturing (AM) methods, using an nScrypt 3Dn-Tabletop printer, together with stereolithography (SLA) digital light processing (DLP) 3D printing. Ultra-violet (UV) curable ceramic resins are used to create high temperature connectors. A design environment is also described, in which first time correct, interconnect layers are verified in software to reduce the risk of errors. A Ceramic Wiring Board Process Design Kit (CWBPDK) allows the design of single or multiple layers of metal, with fabricated SiC die. This interconnect is verified with standard design rule checking (DRC) and layout vs. schematic (LVS) software. Entire systems in packages can be verified using multiple SiC die. Input and output pins (I/O) are connected to these modules using metal connectors. After design, manufacturing can be performed in just a few days. A system in package for driving a stepper motor was designed and fabricated using this packaging method. The motor actuator design utilizes four separate SiC die. These die contain large JFETs designed for sourcing current in a unipolar stepper motor architecture. This module was placed in a furnace at 470°C and demonstrated functional operation for over 1000 hours. These devices were able to source an average of 30 mA in >400°C temperatures to drive the room temperature stepper motor. A high I/O count, next generation package for discrete SiC chips was also designed using this packaging system. A single large JFET component was soaked for over 100 hours at both 500°C and 800°C. Utilizing Ozark IC’s automated test design environment, several DC and transient variables were captured for both tests and will be presented.

Periphery protection for silicon carbide devices: state of the art and simulation

1997 ◽  
Vol 46 (1-3) ◽  
pp. 210-217 ◽  
Author(s):  
D. Planson ◽  
M.L. Locatelli ◽  
S. Ortolland ◽  
J.P. Chante ◽  
H. Mitlehner ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
State Of The Art

High Quality 100mm 4H-SiC Substrates with Low Resistivity

2010 ◽  
Vol 645-648 ◽  
pp. 3-8 ◽  
Author(s):  
Thomas L. Straubinger ◽  
Erwin Schmitt ◽  
S. Storm ◽  
Michael Vogel ◽  
Arnd Dietrich Weber ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Surface Quality ◽  
State Of The Art ◽  
Stacking Fault ◽  
Device Fabrication ◽  
Crystalline Quality ◽  
High Quality ◽  
Dislocation Densities ◽  
Historic Development ◽  
Low Crystalline

One of the most crucial defects for the device fabrication on silicon carbide (SiC) substrates are areas with low crystalline quality and micro-pipe clusters which can still occupy several percent of the area in commercial available 4H-substrates. These defects originate from the seed or are generated by modification changes during growth and can be easily detected under crossed polarizers. In this presentation the historic development at SiCrystal from Acheson material to wafers with 100mm diameter, state of the art micro-pipe density and excellent crystalline quality (FWHM < 20 arcsec) on whole area will be shown. Additionally the influence of carbon inclusions on surface quality and the present dislocation densities in 4H substrates will be discussed. While carbon inclusions were reduced to uncritical levels dislocation densities are still in the range of 104 cm-2. Therefore strategies for further reduction will be pointed out. Finally a resistivity limit (16 mΩcm) for stacking fault formation during annealing at 1150°C will be defined.

SIMS Analysis of Nitrogen in Silicon Carbide Using Raster Change Technique

2006 ◽  
Vol 911 ◽  
Author(s):  
Larry Wang ◽  
Byoung-Suk Park
Keyword(s):  
Silicon Carbide ◽  
Detection Limit ◽  
Measurement Technique ◽  
Nitrogen Doping ◽  
State Of The Art ◽  
Nitrogen Concentration ◽  
Accurate Determination ◽  
Background Doping ◽  
Sims Analysis ◽  
Secondary Ion

AbstractToday's state of the art silicon carbide (SiC) growth can produce semi-insulating crystals with a background doping around 5×1015 atoms/cm3 or lower. It is essential to have an accurate measurement technique with low enough detection limit to measure low level nitrogen concentration. Current SIMS detection limit of low E15 atoms/cm3 will provide accurate determination for nitrogen doping level of 5E16 at/cm3 or higher. In order to determine the lower nitrogen concentration, it is necessary to provide a better detection limit and to separate the contribution of background nitrogen properly. The “raster changing” method provides an accurate way to determine and remove contribution of background nitrogen to the signal, because secondary ion intensities and matrix ion intensities can be analyzed at the same location of the sample by changing the primary beam raster size during a profile. In this study we have succeeded in applying the raster changing method to (a) N in the SiC substrate located under an SiC epi layer, and (b) the detection of N as low as 3E14/ cm3 a bulk-doped SiC substrate.

A comparative evaluation of new silicon carbide diodes and state-of-the-art silicon diodes for power electronic applications

2003 ◽  
Vol 39 (4) ◽  
pp. 915-921 ◽  
Author(s):  
A. Elasser ◽  
M.H. Kheraluwala ◽  
M. Ghezzo ◽  
R.L. Steigerwald ◽  
N.A. Evers ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Comparative Evaluation ◽  
State Of The Art ◽  
Power Electronic
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