scholarly journals Validation of contrast and phenomenology in the Digital Imaging and Remote Sensing (DIRS) lab's image generation (DIRSIG) model

1994 ◽  
Author(s):  
John E. Mason ◽  
John R. Schott ◽  
Carl Salvaggio ◽  
Joseph D. Sirianni
Keyword(s):  
Remote Sensing ◽  
Digital Imaging ◽  
Image Generation

Digital imaging and remote sensing image generator (DIRSIG) as applied to NVESD sensor performance modeling

2016 ◽  
Author(s):  
Kimberly E. Kolb ◽  
Hee-sue S. Choi ◽  
Balvinder Kaur ◽  
Jeffrey T. Olson ◽  
Clayton F. Hill ◽  
...  
Keyword(s):  
Remote Sensing ◽  
Digital Imaging ◽  
Performance Modeling ◽  
Remote Sensing Image ◽  
Sensor Performance ◽  
Image Generator

Remote Sensing Image Generation From Audio

2020 ◽  
pp. 1-5
Author(s):  
Zhiyuan Zheng ◽  
Jun Chen ◽  
Xiangtao Zheng ◽  
Xiaoqiang Lu
Keyword(s):  
Remote Sensing ◽  
Remote Sensing Image ◽  
Image Generation

scholarly journals Design and Development of IP for Modified Haar Wavelet Transform (MHWT) Image Fusion using FPGA

2018 ◽  
Vol 7 (1) ◽  
pp. 57
Author(s):  
Sumant S Yaliagr ◽  
Sanket Dessai
Keyword(s):  
Remote Sensing ◽  
Wavelet Transform ◽  
Image Fusion ◽  
Digital Imaging ◽  
Visual Analysis ◽  
Timing Analysis ◽  
Haar Wavelet ◽  
Haar Wavelet Transform ◽  
Fused Image ◽  
Satellite Applications

<p>The fast growth in the field of digital imaging applications in remote sensing, bio medical and other satellite applications had created an architecture studies for image fusion in capable to store large amount of data and process. An algorithm considered for the process of image fusion for implementation of FPGA is Modified Haar Wavelet Transform (MHWT) based image fusion where at the time four pixels are consider in calculation of different bands as compared to conventional Haar wavelet based image fusion. The process of modification uses far less memory and computation power. The FPGA implementation of MHWT based image fusion is done on Digilent development board with Spartan 6 series FPGA. The architecture is developed in VHDL. The timing analysis is done and report is obtained for I/O interactions, memory units etc. The architecture is made to run in cosimulation with Simulink. The design is tested with different kinds of images and run successfully. The visual analysis of the resultant fused image is achived and observed.</p>

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