Postdeposition annealing effect on atomic-layer-deposited Al2O3 gate insulator on (001) β-Ga2O3

Author(s):  
Atsushi Hiraiwa ◽  
Kiyotaka Horikawa ◽  
Hiroshi Kawarada ◽  
Motohisa Kado ◽  
Katsunori Danno
Author(s):  
Dong Gun Kim ◽  
Cheol Hyun An ◽  
Sanghyeon Kim ◽  
Dae Seon Kwon ◽  
Junil Lim ◽  
...  

Atomic layer deposited TiO2- and Al2O3-based high-k gate insulator (GI) were examined for the Ge-based metal-oxide-semiconductor capacitor application. The single-layer TiO2 film showed a too high leakage current to be...


2004 ◽  
Vol 269 (2-4) ◽  
pp. 181-186 ◽  
Author(s):  
G.X. Shi ◽  
P. Jin ◽  
B. Xu ◽  
C.M. Li ◽  
C.X. Cui ◽  
...  

2021 ◽  
Vol 11 (11) ◽  
pp. 4838
Author(s):  
Je-Hyuk Kim ◽  
Youngjin Seo ◽  
Jun Tae Jang ◽  
Shinyoung Park ◽  
Dongyeon Kang ◽  
...  

Accurate circuit simulation reflecting physical and electrical stress is of importance in indium gallium zinc oxide (IGZO)-based flexible electronics. In particular, appropriate modeling of threshold voltage (VT) changes in different bias and bending conditions is required for reliability-aware simulation in both device and circuit levels. Here, we present SPICE compatible compact modeling of IGZO transistors and inverters having an atomic layer deposition (ALD) Al2O3 gate insulator on a polyethylene terephthalate (PET) substrate. Specifically, the modeling was performed to predict the behavior of the circuit using stretched exponential function (SEF) in a bending radius of 10 mm and operating voltages ranging between 4 and 8 V. The simulation results of the IGZO circuits matched well with the measured values in various operating conditions. It is expected that the proposed method can be applied to process improvement or circuit design by predicting the direct current (DC) and alternating current (AC) responses of flexible IGZO circuits.


2007 ◽  
Vol 544-545 ◽  
pp. 753-756
Author(s):  
In Jae Back ◽  
Su Cheol Gong ◽  
Hun Seoung Lim ◽  
Ik Sub Shin ◽  
Seoung Woo Kuk ◽  
...  

The organic-inorganic field effect transistors (OIFETs) with ZnS active layer were fabricated on the ITO/glass substrate using cross-linked PVP (poly-4-vinylphenol) as a gate insulator. ZnS semiconductor films were prepared by the atomic layer deposition method. In the case of cross-linked PVP film, the leakage current and capacitance were about 1× 10-8 A and 12 nF/cm2, showing good gate insulation property. The carrier concentration and mobility of ZnS film deposited on SiO2/Si wafer was found to be -9.4×1015 cm-3 and 49.0 cm2/ V·sec, respectively. For the OIFET devices with ITO/PVP/ZnS/Ti:Au structure, the carrier mobility was about 1.9 cm2/V·sec. From the AFM images, lower mobility in the OIFET device compared with ZnS film on SiO2/Si substrate may be attributed to a rough surface morphology of ZnS film.


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