Effect of Crystallographic Quality of Grain Boundaries on Both Mechanical and Electrical Properties of Electroplated Copper Thin Film Interconnections

2011 ◽  
Author(s):  
Naokazu Murata ◽  
Naoki Saito ◽  
Kinji Tamakawa ◽  
Ken Suzuki ◽  
Hideo Miura
Keyword(s):  
Thin Film ◽  
Brittle Fracture ◽  
Grain Boundaries ◽  
Fracture Mode ◽  
Electron Back Scatter Diffraction ◽  
Fracture Rate ◽  
Copper Films ◽  
Average Grain Size ◽  
Electroplated Copper

Both mechanical and electronic properties of electroplated copper films used for interconnections were investigated experimentally considering the change of their micro texture caused by heat treatment. The fracture strain of the film annealed at 400°C increased from about 3% to 15% and their yield stress decreased from about 270 MPa to 90 MPa. In addition, it was found that two different fatigue fracture modes appeared in the film. One was a typical ductile fracture mode and the other was brittle one. When the brittle fracture occurred, a crack propagated along weak or porous grain boundaries which were formed during electroplating. The brittle fracture mode disappeared after the annealing at 300°C. These results clearly indicated that the mechanical properties of electroplated copper thin films vary drastically depending on their micro texture. The electrical reliability of the electroplated copper yjin film interconnections was also investigated. The interconnections used for electromigration tests were made using by a damascene process. An abrupt fracture mode due to local fusion appeared in the as-electroplated interconnections. Since the fracture rate increased almost linearly with the square of the applied current density, this fracture mode was dominated by local Joule heating. It seemed that the local current concentration occurred around the porous grain boundaries. The life of the interconnections was improved drastically after the annealing at 400°C. This was because of the increase of the average grain size and the improvement of the quality of grain boundaries in the annealed interconnections. However, the stress-induced migration occurred in the interconnections annealed at 400°C. This was because of the high tensile residual stress caused by the constraint of the densification of the films during annealing by the surrounding oxide film. Therefore, it is very important to control the crystallographic quality of electroplated copper films for improving the reliability of thin film interconnections. The quality of the grain boundaries can be evaluated by applying an EBSD (Electron Back Scatter Diffraction) analysis. New two experimentally determined parameters are proposed for evaluating the quality of grain boundaries quantitatively. It was confirmed that the crystallographic quality of grain boundaries can be evaluated quantitatively by using the two parameters, and it is possible to estimate both the strength and reliability of the interconnections.

Micro Texture Dependence of Both the Mechanical and Electrical Properties of Electroplated Copper Thin Films Used for Interconnection

2010 ◽  
Author(s):  
Naokazu Murata ◽  
Naoki Saito ◽  
Kinji Tamakawa ◽  
Ken Suzuki ◽  
Hideo Miura
Keyword(s):  
Thin Film ◽  
Thin Films ◽  
Electrical Properties ◽  
Grain Boundaries ◽  
Fracture Mode ◽  
The Other ◽  
Copper Films ◽  
Mechanical And Electrical Properties ◽  
Electroplated Copper

Both mechanical and electrical properties of electroplated copper thin films were investigated experimentally with respect to changes in their micro texture. Clear recrystallization was observed after the annealing even at low temperature of about 150°C. The fracture strain of the film annealed at 400°C increased from the initial value of about 3% to 15%, and at the same time, the yield stress of the annealed film decreased from about 270 MPa to 90 MPa. In addition, it was found that there were two fatigue fracture modes in the film annealed at the temperatures lower than 200°C. One was a typical ductile fracture mode with plastic deformation and the other was brittle one. When the brittle fracture occurred, the crack propagated along weak or porous grain boundaries which remained in the film after electroplating. The brittle fracture mode disappeared after the annealing at 400°C. These results clearly indicated that the mechanical properties of electroplated copper thin films vary drastically depending on their micro texture. Next, the electrical reliability of electroplated copper thin film interconnections was discussed. The interconnections used for electromigration (EM) tests were made by damascene process. The width of the interconnections was varied from 1 μm to 10 μm. An abrupt fracture mode due to local fusion appeared in the as-electroplated films within a few hours during the test. Since the fracture rate increased linearly with the increase of square of the applied current density, this fracture mode was dominated by local Joule heating. It seemed that the local resistance of the film increased due to the porous grain boundaries and thus, the local temperature around the porous grain boundaries increased drastically. On the other hand, the life of the interconnections annealed at 400°C was improved significantly. This was because of the increase of the average grain size and the improvement of the quality of grain boundaries in the annealed films. The electrical properties of the electroplated copper films were also dominated by their micro texture. However, the stress migration occurred in the interconnections after the annealing at 400°C. This was because of the high residual tensile stress caused by the constraint of the densification of the films by the surrounding oxide film in the interconnection structures during the annealing. Finally, electroplating condition was controlled to improve the electrical properties. Both the resistance of electromigration and electrical resistivity were improved significantly. However, electromigration of copper atoms still occurred at the interface between the electroplated copper and the thin tantalum (Ta) layer sputtered as base material. Therefore, it is very important to control the crystallographic quality of electroplated copper films and the interface between different materials for improving the reliability of thin film interconnections.

Improvement of Thermal Conductivity of Electroplated Copper Thin-Film Interconnections by Controlling Their Micro Texture

2014 ◽  
Author(s):  
Pornvitoo Rittinon ◽  
Ken Suzuki ◽  
Hideo Miura
Keyword(s):  
Thin Film ◽  
Thin Films ◽  
Thermal Conductivity ◽  
Grain Boundaries ◽  
Diffraction Method ◽  
Electron Back Scatter Diffraction ◽  
High Resistivity ◽  
Copper Thin Film ◽  
Electroplated Copper ◽  
The Relationship

Copper thin films are indispensable for the interconnections in the advanced electronic products, such as TSV (Trough Silicon Via), fine bumps, and thin-film interconnections in various devices and interposers. However, it has been reported that both electrical and mechanical properties of the films vary drastically comparing with those of conventional bulk copper. The main reason for the variation can be attributed to the fluctuation of the crystallinity of grain boundaries in the films. Porous or sparse grain boundaries show very high resistivity and brittle fracture characteristic in the films. Thus, the thermal conductivity of the electroplated copper thin films should be varied drastically depending on their micro texture based on the Wiedemann-Franz’s law. Since the copper interconnections are used not only for the electrical conduction but also for the thermal conduction, it is very important to quantitatively evaluate the crystallinity of the polycrystalline thin-film materials and clarify the relationship between the crystallinity and thermal properties of the films. The crystallinity of the interconnections were quantitatively evaluated using an electron back-scatter diffraction method. It was found that the porous grain boundaries which contain a significant amount of vacancies increase the local electrical resistance in the interconnections, and thus, cause the local high Joule heating. Such porous grain boundaries can be eliminated by control the crystallinity of the seed layer material on which the electroplated copper thin film is electroplated.

Effect of Crystallographic Quality of Grain Boundaries on Both Mechanical and Electrical Properties of Electroplated Copper Thin Film Interconnections

2015 ◽  
Vol 137 (3) ◽  
Author(s):  
Naokazu Murata ◽  
Naoki Saito ◽  
Kinji Tamakawa ◽  
Ken Suzuki ◽  
Hideo Miura
Keyword(s):  
Electrical Properties ◽  
Grain Boundaries ◽  
Fatigue Fracture ◽  
High Crystallinity ◽  
Mechanical And Electrical Properties ◽  
Copper Interconnection ◽  
Electroplated Copper ◽  
Two Parameters ◽  
Low Crystallinity

Effects of crystallographic quality of grain boundaries on mechanical and electrical properties were investigated experimentally. A novel method using two parameters of image quality (IQ) and confidence index (CI) values based on electron back-scattering diffraction (EBSD) analysis was proposed in order to evaluate crystallographic quality of grain boundaries. IQ value was defined as an index to evaluate crystallinity in region irradiated with electron beam. CI value determined existence of grain boundaries in the region. It was found that brittle intergranular fatigue fracture occurred in the film without annealing and the film annealed at 200 °C because network of grain boundaries with low crystallinity remained in these films. On the other hand, the film annealed at 400 °C caused only ductile transgranular fatigue fracture because grain boundaries with low crystallinity almost disappeared. From results of measurement of electrical properties, electrical resistivity of copper interconnection annealed at 400 °C with high crystallinity (2.09 × 10−8 Ωm) was low and electron migration (EM) resistance was high compared with an copper interconnection without annealing with low crystallinity (3.33 × 10−8 Ωm). It was clarified that the interconnection with high crystallinity had superior electrical properties. Thus, it was clarified that the crystallographic quality of grain boundaries has a strong correlation of mechanical and electrical reliability.

Effect of the Crystallinity on the Electromigration Resistance of Electroplated Copper Thin-Film Interconnections

2017 ◽  
Vol 139 (2) ◽  
Author(s):  
Takeru Kato ◽  
Ken Suzuki ◽  
Hideo Miura
Keyword(s):  
Thin Film ◽  
Activation Energy ◽  
Grain Boundaries ◽  
Joule Heating ◽  
Current Density ◽  
Constant Current ◽  
Maximum Temperature ◽  
Copper Thin Film ◽  
Electroplated Copper ◽  
Low Crystallinity

Dominant factors of electromigration (EM) resistance of electroplated copper thin-film interconnections were investigated from the viewpoint of temperature and crystallinity of the interconnection. The EM test under the constant current density of 7 mA/cm2 was performed to observe the degradation such as accumulation of copper atoms and voids. Formation of voids and the accumulation occurred along grain boundaries during the EM test, and finally the interconnection was fractured at the not cathode side but at the center part of the interconnection. From the monitoring of temperature of the interconnection by using thermography during the EM test, this abnormal fracture was caused by large Joule heating of itself under high current density. In order to investigate the effect of grain boundaries on the degradation by EM, the crystallinity of grain boundaries in the interconnection was evaluated by using image quality (IQ) value obtained from electron backscatter diffraction (EBSD) analysis. The crystallinity of grain boundaries before the EM test had wide distribution, and the grain boundaries damaged under the EM loading mainly were random grain boundaries with low crystallinity. Thus, high density of Joule heating and high-speed diffusion of copper atoms along low crystallinity grain boundaries accelerated the EM degradation of the interconnection. The change of Joule heating density and activation energy for the EM damage were evaluated by using the interconnection annealed at 400 °C for 3 h. The annealing of the interconnection increased not only average grain size but also crystallinity of grains and grain boundaries drastically. The average IQ value of the interconnection was increased from 4100 to 6200 by the annealing. The improvement of the crystallinity decreased the maximum temperature of the interconnection during the EM test and increased the activation energy from 0.72 eV to 1.07 eV. The estimated lifetime of interconnections is increased about 100 times by these changes. Since the atomic diffusion is accelerated by not only the current density but also temperature and low crystallinity grain boundaries, the lifetime of the interconnections under EM loading is a strong function of their crystallinity. Therefore, it is necessary to evaluate and control the crystallinity of interconnections quantitatively using IQ value to assure their long-term reliability.

Crystallinity Control of Electroplated Interconnections for Improving Their Stability and Lifetime

2016 ◽  
Author(s):  
Jiatong Liu ◽  
Ken Suzuki ◽  
Hideo Miura
Keyword(s):  
Thin Film ◽  
Thin Films ◽  
Residual Stress ◽  
Grain Boundaries ◽  
Lattice Mismatch ◽  
Bulk Material ◽  
Chemical Properties ◽  
Mechanical Fracture ◽  
Copper Thin Film ◽  
Electroplated Copper

In a three-dimensional (3D) packaging systems, the interconnections which penetrate stacked silicon chips have been employed. Such interconnection structure is called TSV (Through Silicon Via) structure, and the via is recently filled by electroplated copper thin film. The electroplated copper thin films often consist of fine columnar grains and porous grain boundaries with high density of defects which don’t appear in conventional bulk material. This unique micro texture has been found to cause the wide variation of physical and chemical properties of this material. In the TSV structure, the shrinkage of the copper thin film caused by thermal deformation and recrystallization of the unique texture during high-temperature annealing is strictly constrained by surrounding rigid Si and thus, high tensile residual stress remains in the thin film after thermal annealing. High residual stress should give rise to mechanical fracture of the interconnections and the shift of electronic function of thin film devices formed in Si. Therefore, the residual stress in the interconnections should be minimized by controlling the appearance of the porous boundaries during electroplating for assuring the longterm reliability of the interconnections. As the lattice mismatch between Cu and its barrier film (Ta) is as larger as 18%, which is the main reason for the fine columnar structures and porous grain boundaries, it is necessary to control the underlayer crystallinity to improve the crystallinity of electroplated copper thin films. In this study, the effective method for controlling the crystallinity of the underlayer was investigated by improving the atomic configuration in the electroplated copper thin film. The result showed that by controlling the crystallinity of underlayer, crystallinity of electroplated copper thin films can be improved, the mechanical properties of thin films was improved and thus, stability and lifetime of electroplated copper interconnections can be improved.

Mechanical and Electrical Properties of Electroplated Copper Thin Films Used for Thin Film Interconnection

2010 ◽  
Vol 1249 ◽  
Author(s):  
Murata Naokazu ◽  
Kinji Tamakawa ◽  
Ken Suzuki ◽  
Hideo Miura
Keyword(s):  
Thin Films ◽  
Residual Stress ◽  
Electrical Properties ◽  
Grain Boundaries ◽  
The Other ◽  
Mechanical And Electrical Properties ◽  
Average Grain Size ◽  
Columnar Grains ◽  
Electroplated Copper ◽  
Electrical Reliability

AbstractMicro-texture dependence of both the mechanical and electrical properties of electroplated copper thin films was discussed experimentally considering the change of their micro texture caused by thermal history after the electroplating. Both the static and fatigue strength of the films changed drastically depending on the micro texture and it was found that there were two fatigue fracture modes in the films. One was a typical ductile intragranular fracture and the other was brittle intergranular one. The reason for the variation of the strength of the electroplated copper thin films was attributed to the variation of the average grain size and the characteristics of grain boundaries. In addition, the electrical reliability of the electroplated copper interconnections was discussed under electromigration tests. Though abrupt fracture mode due to the local fusion appeared in the as-electroplated films, the life of the interconnections was improved significantly after the annealing at temperatures high than 200°C. Typical change of the surface morphology of the film, i.e., the formation of voids and hillocks were observed on their surfaces after the annealing. This was also caused by the change of the micro texture from fine grains with porous grain boundaries to coarsened columnar grains with rigid grain boundaries. However, the stress-induced migration appeared in the annealed narrow interconnections, in particular. This was because of high tensile residual stress occurred in the film due to the constraint of the shrinkage of the films by rigid oxide around them. These results clearly indicated that the control of both the micro-texture and residual stress is indispensable for improving the reliability of the interconnectins.

Annealing effect of absorber layer on SnS/CdS heterojunction band alignments

2021 ◽  
Author(s):  
Ashenafi Abadi Elyas ◽  
Sai Myo Than Htay ◽  
Yoshio HASHIMOTO ◽  
Ito Kentaro ◽  
Noritaka Momose
Keyword(s):  
Thin Film ◽  
Vacuum Annealing ◽  
Hole Mobility ◽  
Annealing Effect ◽  
Band Alignment ◽  
Secondary Phases ◽  
Average Grain Size ◽  
Band Alignments ◽  
Sns Thin Films

Abstract The effect of annealing on physical properties of a SnS thin film and also on SnS/CdS heterojunction band alignment was studied. Vacuum annealing has greatly improved the crystalline quality of SnS and average grain size of 1.6 µm was achieved. Sulfur-rich secondary phases observed on the surface of as-grown SnS thin film were eliminated after vacuum annealing, resulting in a decrease of the resistivity and an increase of the carrier concentration of the film. A maximum hole mobility of 17 cm2V-1s-1 was obtained for SnS thin films annealed at 400 ֯C. A transition of SnS/CdS heterojunction from “spike” type to “cliff” type was observed when the vacuum annealed SnS thin film was post-air-annealed at 200 and 250 ֯C. The band alignment of SnS/CdS heterojunction could be adjustable between “spike” type to “cliff” type via vacuum annealing followed by post-air-annealing.

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