Intermetallic Effects of Electroplated Lead-Free Solder Bumps Using a Novel Single Chamber Electroplating Process for Large Diameter Wafers

2007 ◽  
Author(s):  
J. Teye Brown ◽  
Ajay M. Popat ◽  
Chad B. O’Neal ◽  
Yixiang Xie
Keyword(s):  
Cross Sections ◽  
Visual Inspection ◽  
Large Diameter ◽  
Lead Free Solder ◽  
Elemental Mapping ◽  
Single Chamber ◽  
Metal Plating ◽  
Solder Bumps ◽  
Free Solder ◽  
Electroplating Process

In this study solder bumps of various alloys and less than 100 microns in diameter were electroplated using a novel single chamber electroplating process in which the plating baths are exchanged between the different metal plating layers. This equipment is new to the manufacturing arena. The reflow profile and process was then optimized for the various alloys such as SnAg, and electroplated layered SnPb, and PbSn 95/5%, with PbSn 95/5% being the control leaded solder for comparison. Various fluxes were also used during the reflow of these bumps. The solder bumps were reflowed on a conduction reflow oven in a nitrogen environment such that the temperature profile could be carefully controlled. The bumps were analyzed by examining the bump diameter and height uniformity, surface quality, and elemental composition and distribution inside the bumps. These analyses were done by visual inspection by optical microscopy, scanning electron microscopy, and electron dispersive spectroscopy (EDS). The wafers were diced near a row of solder bumps, then podded and polished using a metallographic polishing system to the center of solder bumps. These bump cross-sections were then examined by EDS to perform elemental mapping of the alloy constituents.

Wafer Bumping and Characterizations of Fine-Pitch Lead-Free Solder Microbumps on 12” (300mm) wafer for 3D IC Integration

2011 ◽  
Vol 2011 (1) ◽  
pp. 000650-000656
Author(s):  
J. H. Lau ◽  
P-J Tzeng ◽  
C-K Lee ◽  
C-J Zhan ◽  
M-J Dai ◽  
...  
Keyword(s):  
Cross Sections ◽  
Lead Free ◽  
Lead Free Solder ◽  
Sem Images ◽  
3D Ic ◽  
Fine Pitch ◽  
Solder Bumps ◽  
Before And After ◽  
Free Solder

In this study, the wafer bumping and characterization of fine-pitch lead-free solder microbumps on 300mm wafer for 3D IC integration are investigated. Emphasis is placed on the Cu-plating solutions (conformal and bottom-up). Also, the amount of Cu and solder (Sn) volumes is examined. Furthermore, characterizations such as shearing test and aging of the microbumps are provided and cross sections/SEM images of the microbumps before and after test are discussed. Finally, the process windows of applying the conventional electroplating wafer bumping method of the ordinary solder bumps to the microbumps are also presented.

Quantitative Evaluation of Voids in Lead Free Solder Joints

2015 ◽  
Vol 772 ◽  
pp. 284-289 ◽  
Author(s):  
Sabuj Mallik ◽  
Jude Njoku ◽  
Gabriel Takyi
Keyword(s):  
Solder Bump ◽  
Solder Joints ◽  
Void Formation ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
X Ray ◽  
Size And Shape ◽  
Solder Bumps ◽  
Free Solder

Voiding in solder joints poses a serious reliability concern for electronic products. The aim of this research was to quantify the void formation in lead-free solder joints through X-ray inspections. Experiments were designed to investigate how void formation is affected by solder bump size and shape, differences in reflow time and temperature, and differences in solder paste formulation. Four different lead-free solder paste samples were used to produce solder bumps on a number of test boards, using surface mount reflow soldering process. Using an advanced X-ray inspection system void percentages were measured for three different size and shape solder bumps. Results indicate that the voiding in solder joint is strongly influenced by solder bump size and shape, with voids found to have increased when bump size decreased. A longer soaking period during reflow stage has negatively affectedsolder voids. Voiding was also accelerated with smaller solder particles in solder paste.

Sub-100 μm SnAg Solder Bumping Technology and the Bump Reliability

2009 ◽  
Vol 131 (1) ◽  
Author(s):  
Xiaoqin Lin ◽  
Le Luo
Keyword(s):  
Cu6sn5 Phase ◽  
X Ray ◽  
Solder Bumps ◽  
Average Shear Strength ◽  
Average Shear ◽  
Snag Solder ◽  
Packaging Industry ◽  
Negative Impacts ◽  
Free Solder ◽  
Electroplating Process

Lead-free solder bumping and its related interconnection and reliability are becoming one of the important issues in today’s electronic packaging industry. In this paper, alloy electroplating was used as SnAg solder bumping process. Multiple reflow was preformed on as-plated solder bumps. Scanning electron microscopy and energy dispersive X-ray analysis were used to investigate the intermetallic compound and microvoids of cross-sectioned solder bump. Shear test was used to evaluate the reliabilities of the SnAg bumps. The 13×13 area-array Sn/3.0Ag solder bumps of 70 μm in height and 90 μm in diameter were fabricated with a smooth and shiny surface and with a uniform distribution of Ag. During multireflow, the scalloped Cu6Sn5 phase grows by a ripening process. Volume shrinkage was the main reason for the formation of microvoids during multireflow. The average shear strength of solder bumps on TiW/Cu under bump metallurgy (UBM) increased with reflow times. The electroplating process is suitable for mass production of well-controlled geometry and uniformity of SnAg solder bumps. Microvoids have trivial negative impacts on the solder bonds. The combination of TiW/Cu UBM and SnAg solder is reliable.

Study on electromigration in flip chip lead-free solder connections with 40 μm or 30 μm diameter on thin film ceramic substrates

2015 ◽  
Vol 2015 (1) ◽  
pp. 000799-000805
Author(s):  
Marek Gorywoda ◽  
Rainer Dohle ◽  
Bernd Kandler ◽  
Bernd Burger
Keyword(s):  
Thin Film ◽  
High Stability ◽  
Flip Chip ◽  
Lead Free ◽  
Published Data ◽  
Organic Substrates ◽  
Lead Free Solder ◽  
Ceramic Substrates ◽  
Solder Bumps ◽  
Free Solder

Electromigration comprises one of the processes affecting the long-term reliability of electronic devices; it has therefore been the focus of many investigations in recent years. In regards to flip chip packaging technology, the majority of published data is concerned with electromigration in solder connections to metallized organic substrates. Hardly any information is available in the literature on electromigration in lead-free solder connections on thin film ceramic substrates. This work presents results of a study of electromigration in lead-free (SAC305) flip chip solder bumps with a nominal diameter of 40 μm or 30 μm with a pitch of 100 μm on silicon chips assembled onto thin film Al2O3 ceramic substrates. The under bump metallization (UBM) comprised of a 5 μm thick electroless nickel immersion gold (ENIG) layer directly deposited on the AlCu0.5 trace. The ceramic substrates were metallized using a thin film multilayer (NiCr-Au(1.5 μm)-Ni(2 μm) structure on the top of which wettable areas were produced with high precision by depositing flash Au (60 nm) of the required diameter (40 μm or 30 μm). All electromigration tests were performed at the temperature of 125 °C. Initially, one chip assembly with 40 μm and one with 30 μm solder bumps was loaded with the current density of 8 kA/cm2 for 1,000 h. The assemblies did not fail and an investigation with SEM revealed no significant changes to the microstructure of the bumps. Thereafter seven chip assemblies with 40 μm solder bumps and five assemblies with 30 μm bumps were subjected to electromigration tests of 14 kA/cm2 or 25 kA/cm2, respectively. Six of the 40 μm-assemblies failed after 7,000 h and none of the 30 μm-assemblies failed after 2,500 h of test duration so far. Investigation of failed samples performed with SEM and EDX showed asymmetric changes of microstructure in respect to current flow. Several intermetallic phases were found to form in the solder. The predominant damage of the interconnects was found to occur at the cathode contact to chip; the Ni-P layers there showed typical columnar Kirkendall voids caused by migration of Ni from the layers into the solder. Failure of the contacts apparently occurred at the interface between Ni-P and solder. In summary, the results of the study indicate a very high stability of lead-free solder connections on ceramic substrates against electromigration. This high stability is primarily due to a better heat dissipation and thus to a relatively low temperature increase of the ceramic packages caused by resistive heating during flow of electric current. In addition, the type of the metallization used in the study seems to be more resistant to electromigration than the standard PCB metallization as it does not contain a copper layer.

Lead-Free and PbSn Bump Electromigration Testing

2005 ◽  
Author(s):  
Stephen Gee ◽  
Nikhil Kelkar ◽  
Joanne Huang ◽  
King-Ning Tu
Keyword(s):  
Cross Sections ◽  
Current Density ◽  
Critical Issue ◽  
Electronics Industry ◽  
Limiting Factor ◽  
Time To Failure ◽  
Solder Bumps ◽  
Free Solder ◽  
Mean Time ◽  
Eutectic Snpb

As the electronics industry continues to push for miniaturization, several reliability factors become vital issues. The demand for a high population of smaller and smaller solder bumps, while also increasing the current, have resulted in a significant increase in the current density. As outlined in the International Technology of Roadmap for Semiconductors (ITRS), this trend makes electromigration the limiting factor in high density packages. The heightened current density and correspondingly elevated operating temperatures are a critical issue in reliability since these factors facilitate the effects of electromigration. Therefore, as bump sizes continue to decrease, the study of electromigration reliability becomes crucial in order to understand and possibly prevent the causes of failure. A systematic study of electromigration in eutectic SnPb and Pb-free solder bumps was conducted in order to characterize the reliability of the Micro SMD package family. The testing includes both eutectic 63Sn-37Pb and 95.5Sn4.0Ag-0.5Cu solder bumps on an Al/Ni(V)/Cu under-bump-metallization. Mean-time-to-failure results are compared to Black’s Equation and cross-sections of the solder bumps are shown to analyze the mechanisms that led to failure.

Experimental Study of Void Formation in Eutectic and Lead-Free Solder Bumps of Flip-Chip Assemblies

2005 ◽  
Vol 128 (3) ◽  
pp. 202-207 ◽  
Author(s):  
Daijiao Wang ◽  
Ronald L. Panton
Keyword(s):  
Experimental Study ◽  
Heat Flux ◽  
Flip Chip ◽  
Void Formation ◽  
Lead Free ◽  
Void Volume ◽  
Lead Free Solder ◽  
Solder Bumps ◽  
Free Solder ◽  
High Lead

This paper reports the experimental findings of void formation in eutectic and lead-free solder joints of flip-chip assemblies. A previous theory indicated that the formation of voids is determined by the direction of heating. The experiments were designed to examine the size and location of voids in the solder samples subject to different heat flux directions. A lead-free solder (Sn-3.5Ag-0.75Cu) and a eutectic solder (63Sn37Pb) were employed in the experiments. Previous experiments [Wang, D., and Panton, R. L., 2005, “Experimental Study of Void Formation in High-Lead Solder Joints of Flip-Chip Assemblies,” ASME J. Electron. Packag., 127(2), pp. 120–126; 2005, “Effect of Reversing Heat Flux Direction During Reflow on Void Formation in High-Lead Solder Bumps,” ASME J. Electron. Packag., 127(4), pp. 440–445] employed a high lead solder. 288 solder bumps were processed for each solder. Both eutectic and lead-free solder have shown fewer voids and much smaller void volume than those for high-lead solder. Compared with lead-free solder, eutectic solder has a slightly lower void volume and a lower percentage of defective bumps. For both eutectic and lead-free solders, irrespective of the cooling direction, heating solder samples from the top shows fewer defective bumps and smaller void volume. No significant effect on void formation for either eutectic or lead-free solder was found via reversing the heat flux direction during cooling. Unlike high-lead solder, small voids in eutectic or lead-free solder comprised 35-88% of the total void volume. The final distribution of voids shows a moderate agreement with thermocapillary theory, indicating the significance of the temperature gradient on the formation of voids.

Design and Fabrication of MEMS Based Microphone Module by Using 3D Chip-on-Chip Package

2007 ◽  
Author(s):  
Jeffery C. C. Lo ◽  
S. W. Ricky Lee
Keyword(s):  
Flip Chip ◽  
Lead Free Solder ◽  
Process Flow ◽  
Wire Bonds ◽  
Solder Bumps ◽  
Preliminary Study ◽  
Mems Device ◽  
Free Solder ◽  
On Chip ◽  
Electrical Connections

Packaging of the MEMS based microphone is very important as the sensing diaphragm is very fragile. A suitable packaging method is required for the MEMS based microphone. In order to have a better understanding of packaging related issues of microphone, commercially available MEMS based microphone package is studied. Based on the preliminary study, a 3D Chip-on-Chip modulus is selected. The detail process flow of the mentioned package will be discussed in the following sections. Flip chip with lead free solder bumps are used in the proposed 3D Chip-on-Chip modulus. In contrast, wire bonds are used in the commercial MEMS based microphone for electrical connections while die attached is used to provide the mechanical support. The advantages of using flip chip over wire bond in both manufacturability and reliability aspects are discussed. Several MEMS based microphone packaging related issues are studied and evaluated. The detail fabrication and assembly process flow will be presented. A prototype package with MEMS device is fabricated. It can be shown that the proposed 3D Chip-on-Chip modulus is feasible for packaging MEMS based microphone.

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