Evaluation of and Inspection Metrology for Lid Attach for Advanced Thermal Packaging Materials

2007 ◽  
Author(s):  
Margaret Stern ◽  
Bob Melanson ◽  
Vadim Gektin ◽  
Paul Hundt ◽  
Carlos Arroyo ◽  
...  
Keyword(s):  
High Performance ◽  
Flip Chip ◽  
Technology Development ◽  
Acoustic Microscopy ◽  
Thermal Interface Material ◽  
Development Effort ◽  
Plating Bath ◽  
X Ray ◽  
Dark Ring ◽  
Advanced Packaging

We have evaluated a new Ag-filled silicone thermal interface material (TIM) for its sensitivity to lid finish and impact on imaging discontinuities in the die/lid (TIM1) layer, in conjunction with two high performance lid materials, as a part of our advanced packaging technology development effort. Thermal and mechanical (shear stress and lid pull) measurements have been carried out on a number of different lid finishes to optimize thermal performance and adhesion at the TIM1/lid interface. This silicone TIM1 is found to be sensitive to the type of Ni-plating and plating bath chemistry. Nondestructive and destructive metrology has been carried out on flip chip (FC) packages using Ag-filled silicone TIM1 and either Cu or AlSiC lids. A number of silicone formulations have been investigated to assess their impact on surface acoustic microscopy (SAM) and X-ray imaging. Nondestructive evaluation (NDE) by real time X-ray and SAM has identified artifacts that make it difficult to unambiguously detect voids and delamination in the TIM1 layer. A “dark ring” or “picture frame” artifact is observed at the die perimeter in acoustic microscope images of packages with the Ag-filled TIM1. Detailed SEM cross-section and thermal mapping analyses on a number of specially constructed FC packages have been correlated with TIM1/lid delamination and voiding observed in SAM and X-ray images. Results of these studies point to changes in the TIM1 modulus during cure and post cure thermal excursions as the cause of the “dark ring” observed in the transmission SAM images rather than delamination at the TIM1/lid or TIM1/die interfaces. However, in the event that delamination is present at the edges it cannot be unambiguously deconvoluted from the “dark ring” artifact in the SAM images.

Applications of 3D X-Ray Microscopy for Advanced Package Development

2011 ◽  
Vol 2011 (1) ◽  
pp. 001078-001083 ◽  
Author(s):  
K. Fahey ◽  
R. Estrada ◽  
L. Mirkarimi ◽  
R. Katkar ◽  
D. Buckminster ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Flip Chip ◽  
Development Stage ◽  
Development Effort ◽  
X Ray ◽  
Structural Details ◽  
Volumetric Images ◽  
Advanced Packaging ◽  
Solder Fatigue ◽  
Non Destructive

This paper describes the utilization of non-destructive imaging using 3D x-ray microscopy for package development and failure analysis. Four case studies are discussed to explain our methodology and its impact on our advanced packaging development effort. Identifying and locating failures embedded deep inside the package, such as a solder fatigue failure within a flip chip package, without the need for physical cross-sectioning is of substantial benefit because it preserves the package for further analysis. Also of utility is the ability to reveal the structural details of the package while producing superior quality 2D and volumetric images. The technique could be used not only for analysis of defects and failures, but also to characterize geometries and morphologies during the process and package development stage.

Advanced lithography and electroplating approach to form high-aspect ratio copper pillars

2015 ◽  
Vol 2015 (1) ◽  
pp. 000793-000798
Author(s):  
Keith Best ◽  
Roger McCleary ◽  
Richard Hollman ◽  
Phillip Holmes
Keyword(s):  
Aspect Ratio ◽  
High Aspect Ratio ◽  
High Performance ◽  
Flip Chip ◽  
Technology Development ◽  
Semiconductor Industry ◽  
Scale Up ◽  
Wafer Level ◽  
Integration Schemes ◽  
Advanced Packaging

Advanced packaging technologies continue to enable the semiconductor industry to meet the needs for ever thinner, smaller and faster components required in mobile devices and other high performance applications. In the early days of advanced packaging, C4 solder bumps were the alternative to wire bonding. Although lead-free solder remains one of the preferred methods for assembly, tall copper structures (copper pillars) are becoming the standard interconnect solution for many applications. A process of lithography and subsequent electroplating are the mainstream process for today's copper pillar formation on wafer level for high-end flip chip devices. The latest trends in advanced packaging require another technology development when it comes to copper pillars. Modern integration schemes such as 2.5D interposer as well as 3D stacking have pushed the limits of standard lithography and copper electroplating capabilities. Specifically, the need for fine-pitch high aspect ratio copper pillars represents a challenge. In addition, the trend towards rectangular panel-based packaging as seen with glass interposers or panel fan-out (P-FO) devices demands a challenging scale-up of lithography and electroplating equipment and processing capabilities. This work specifically focuses on the formation of high-aspect ratio copper pillars in excess of 100μm by means of stepper-based lithography followed by electroplating. A unique test vehicle has been created to evaluate the process latitude for lithography for different resist materials as well as the specific electroplating challenges associated with these tall and narrow structures. The paper investigates the influence of key parameters such as CD uniformity, pattern density variations and resist profile on the critically important pillar height uniformity across the wafer or panel. In addition, the resist profile behavior at the substrate interface is being examined as it influences undercut behavior during wet etch of the plating seed layer. A number of wet and dry-film resist materials and appropriate lithography processes (spin coat or laminate, expose, develop) followed by copper plating based on varying chemistries and process parameters are being explored. The paper also summarizes the current requirements for the above mentioned lithography and plating processes as seen in the industry today.

Impact of Reprocessing Technique on First Level Interconnects of Pb-Free to SnPb Reballed Area Array Flip Chip Devices

2014 ◽  
Vol 2014 (1) ◽  
pp. 000112-000116
Author(s):  
Joelle Arnold ◽  
Steph Gulbrandsen ◽  
Nathan Blattau
Keyword(s):  
Computer Tomography ◽  
Damage Accumulation ◽  
Flip Chip ◽  
Ball Grid Array ◽  
Acoustic Microscopy ◽  
Eutectic Solder ◽  
X Ray ◽  
Area Array ◽  
Solder Balls ◽  
Commercial Off The Shelf

The risk of damage caused by reballing SnPb eutectic solder balls onto a commercial off-the-shelf (COTS) active flip chip with a ball grid array (BGA) of SAC305 was studied. The effects of reballing performed by five different reballers were examined and compared. The active flip chip device selected included manufacturer specified resistance between eight (8) differential port pairs. The path resistance between these pins following reballing, as compared to an unreballed device, was used to assess damage accumulation in the package. 2-dimensional x-ray microscopy, acoustic microscopy, and x-ray computer tomography were also used to characterize the effects of reballing. These studies indicated that no measureable damage was incurred by the reballing process, implying that reballed devices should function as well as non-reballed devices in the same application.

Advanced Packaging for Automotive Dashboard Application

2017 ◽  
Vol 2017 (DPC) ◽  
pp. 1-26
Author(s):  
Nokibul Islam
Keyword(s):  
Integrated Circuit ◽  
High Performance ◽  
Flip Chip ◽  
Wafer Level ◽  
Automotive Market ◽  
Performance Requirements ◽  
Advanced Packaging ◽  
Packaging Industry ◽  
The Right ◽  
Board Level

The current automotive market for the IC (integrated circuit) packaging industry has grown significantly due to the increasing need for automation and higher performance in vehicles. These changes in the automotive market will enable cars to be more reliable and intelligent. To address the increasingly complex demands of the automotive market, the semiconductor packaging industry is shifting its focus to prioritize the development of advanced packages for next generation automotive market requirements. Automotive IC's are traditionally wirebond packages. Due to the increasing complexity and higher performance requirements of automotive applications, the packaging industry is moving towards high performance flip chip packages for automotive infotainment, GPS, and radar applications. In this study a comprehensive view of the changing packaging landscape from traditional wirebond to flip chip interconnect to advanced fan-out wafer level packages will be discussed. The pros and cons of each packaging technology will be examined Packaging roadmap details will be discussed along with assembly process information, determining the right BOM (bill of materials), cost data, and extensive package and board level reliability.

Advanced Packaging for Automotive Dashboard Application

2018 ◽  
Vol 2018 (1) ◽  
pp. 000452-000457
Author(s):  
Nokibul Islam ◽  
HC Choi
Keyword(s):  
Integrated Circuit ◽  
High Performance ◽  
Flip Chip ◽  
Wafer Level ◽  
Automotive Market ◽  
Performance Requirements ◽  
Advanced Packaging ◽  
Packaging Industry ◽  
The Right ◽  
Board Level

Abstract The current automotive market for the integrated circuit (IC) packaging industry has grown significantly due to the increasing need for automation and higher performance in vehicles. These changes in the automotive market will enable cars to be more reliable and intelligent. To address the increasingly complex demands of the automotive market, the semiconductor packaging industry is shifting its focus to prioritize the development of advanced packages for next generation automotive market requirements. Automotive IC's are traditionally wirebond packages. Due to the increasing complexity and higher performance requirements of automotive applications, the packaging industry is moving towards high performance flip chip packages for automotive infotainment, GPS, and radar applications. In this study, a comprehensive view of the evolving packaging landscape from traditional wirebond to flip chip interconnect to advanced fan-out wafer level packages will be discussed. The pros and cons of each packaging technology will be examined. Packaging roadmap details will be discussed along with assembly process information, determining the right bill of materials (BOM), and extensive package and board level reliability (BLR) including grade 1 and grade 0 reliability data will be discussed.

Analysis of electroless nickel thin films

1991 ◽  
Vol 49 ◽  
pp. 510-511 ◽  
Author(s):  
C. W. Price ◽  
E. F. Lindsey
Keyword(s):  
Thin Films ◽  
Inertial Confinement Fusion ◽  
Electroless Nickel ◽  
Inertial Confinement ◽  
Plating Bath ◽  
X Ray ◽  
Nickel Thin Films ◽  
Nickel Deposits ◽  
Confinement Fusion ◽  
Thickness Measurements

Thickness measurements of thin films are performed by both energy-dispersive x-ray spectroscopy (EDS) and x-ray fluorescence (XRF). XRF can measure thicker films than EDS, and XRF measurements also have somewhat greater precision than EDS measurements. However, small components with curved or irregular shapes that are used for various applications in the the Inertial Confinement Fusion program at LLNL present geometrical problems that are not conducive to XRF analyses but may have only a minimal effect on EDS analyses. This work describes the development of an EDS technique to measure the thickness of electroless nickel deposits on gold substrates. Although elaborate correction techniques have been developed for thin-film measurements by x-ray analysis, the thickness of electroless nickel films can be dependent on the plating bath used. Therefore, standard calibration curves were established by correlating EDS data with thickness measurements that were obtained by contact profilometry.

Macroprobe Mode for the Study of Segregation in Steels

1990 ◽  
Vol 48 (2) ◽  
pp. 260-261
Author(s):  
Auclair Gilles ◽  
Benoit Danièle
Keyword(s):  
Mechanical Properties ◽  
Spatial Distribution ◽  
High Performance ◽  
Volume Fraction ◽  
Sheet Steel ◽  
Acquisition Time ◽  
Chemical Information ◽  
X Ray ◽  
Accurate Quantitative Analysis ◽  
Optical Micrographs

During these last 10 years, high performance correction procedures have been developed for classical EPMA, and it is nowadays possible to obtain accurate quantitative analysis even for soft X-ray radiations. It is also possible to perform EPMA by adapting this accurate quantitative procedures to unusual applications such as the measurement of the segregation on wide areas in as-cast and sheet steel products.The main objection for analysis of segregation in steel by means of a line-scan mode is that it requires a very heavy sampling plan to make sure that the most significant points are analyzed. Moreover only local chemical information is obtained whereas mechanical properties are also dependant on the volume fraction and the spatial distribution of highly segregated zones. For these reasons we have chosen to systematically acquire X-ray calibrated mappings which give pictures similar to optical micrographs. Although mapping requires lengthy acquisition time there is a corresponding increase in the information given by image anlysis.

PHAX-SCAN: Functional integration of a Scanning Electron Microscope and an energy-dispersive x-ray analyser

1989 ◽  
Vol 47 ◽  
pp. 56-57
Author(s):  
Marc H. Peeters ◽  
Max T. Otten
Keyword(s):  
Electron Microscope ◽  
Scanning Electron Microscope ◽  
High Speed ◽  
High Performance ◽  
Functional Integration ◽  
Energy Dispersive ◽  
X Rays ◽  
X Ray ◽  
High Speed Analysis ◽  
Scanning Electron

Over the past decades, the combination of energy-dispersive analysis of X-rays and scanning electron microscopy has proved to be a powerful tool for fast and reliable elemental characterization of a large variety of specimens. The technique has evolved rapidly from a purely qualitative characterization method to a reliable quantitative way of analysis. In the last 5 years, an increasing need for automation is observed, whereby energy-dispersive analysers control the beam and stage movement of the scanning electron microscope in order to collect digital X-ray images and perform unattended point analysis over multiple locations.The Philips High-speed Analysis of X-rays system (PHAX-Scan) makes use of the high performance dual-processor structure of the EDAX PV9900 analyser and the databus structure of the Philips series 500 scanning electron microscope to provide a highly automated, user-friendly and extremely fast microanalysis system. The software that runs on the hardware described above was specifically designed to provide the ultimate attainable speed on the system.

Counterfeit Parts Recognition and Detection for Failure Analysts

2010 ◽  
Author(s):  
Katherine V. Whittington
Keyword(s):  
Thermal Cycle ◽  
Visual Inspection ◽  
Acoustic Microscopy ◽  
Scanning Acoustic Microscopy ◽  
3D Measurement ◽  
X Ray ◽  
Wide Range ◽  
Electronic Parts ◽  
Testing Awareness

Abstract The electronics supply chain is being increasingly infiltrated by non-authentic, counterfeit electronic parts, whose use poses a great risk to the integrity and quality of critical hardware. There is a wide range of counterfeit parts such as leads and body molds. The failure analyst has many tools that can be used to investigate counterfeit parts. The key is to follow an investigative path that makes sense for each scenario. External visual inspection is called for whenever the source of supply is questionable. Other methods include use of solvents, 3D measurement, X-ray fluorescence, C-mode scanning acoustic microscopy, thermal cycle testing, burn-in technique, and electrical testing. Awareness, vigilance, and effective investigations are the best defense against the threat of counterfeit parts.

Failure Analysis of Flip-Chip Interconnections Through Acoustic Microscopy

1996 ◽  
Author(s):  
O. Diaz de Leon ◽  
M. Nassirian ◽  
C. Todd ◽  
R. Chowdhury
Keyword(s):  
Failure Analysis ◽  
Large Scale ◽  
Flip Chip ◽  
Ultrasonic Waves ◽  
Acoustic Microscopy ◽  
Acoustic Microscope ◽  
Chip Technology ◽  
Ball Joints ◽  
Non Destructive ◽  
Scanning Acoustic Microscope

Abstract Integration of circuits on semiconductor devices with resulting increase in pin counts is driving the need for improvements in packaging for functionality and reliability. One solution to this demand is the Flip- Chip concept in Ultra Large Scale Integration (ULSI) applications [1]. The flip-chip technology is based on the direct attach principle of die to substrate interconnection.. The absence of bondwires clearly enables packages to become more slim and compact, and also provides higher pin counts and higher-speeds [2]. However, due to its construction, with inherent hidden structures the Flip-Chip technology presents a challenge for non-destructive Failure Analysis (F/A). The scanning acoustic microscope (SAM) has recently emerged as a valuable evaluation tool for this purpose [3]. C-mode scanning acoustic microscope (C-SAM), has the ability to demonstrate non-destructive package analysis while imaging the internal features of this package. Ultrasonic waves are very sensitive, particularly when they encounter density variations at surfaces, e.g. variations such as voids or delaminations similar to air gaps. These two anomalies are common to flip-chips. The primary issue with this package technology is the non-uniformity of the die attach through solder ball joints and epoxy underfill. The ball joints also present defects as open contacts, voids or cracks. In our acoustic microscopy study packages with known defects are considered. It includes C-SCAN analysis giving top views at a particular package interface and a B-SCAN analysis that provides cross-sectional views at a desired point of interest. The cross-section analysis capability gives confidence to the failure analyst in obtaining information from a failing area without physically sectioning the sample and destroying its electrical integrity. Our results presented here prove that appropriate selection of acoustic scanning modes and frequency parameters leads to good reliable correlation between the physical defects in the devices and the information given by the acoustic microscope.

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