Reliability Analysis of Solderless Press-Fit Interconnections

2007 ◽  
Author(s):  
Hironori Tohmyoh ◽  
Kiichiro Yamanobe ◽  
Masumi Saka ◽  
Jiro Utsunomiya ◽  
Takeshi Nakamura ◽  
...  
Keyword(s):  
Friction Coefficient ◽  
Printed Circuit Boards ◽  
Circuit Board ◽  
Small Scale ◽  
Plastic Properties ◽  
Printed Circuit ◽  
Elastic Plastic ◽  
Press Fit ◽  
The Press ◽  
Plated Through Hole

This paper treats typical mechanical problems met in a solderless press-fit assembly. First, the elastic-plastic properties of a pin and the friction coefficient of the pin in thin plated through hole (TH) are determined by the experiments and the three-dimensional finite element (FE) analysis. The elastic-plastic properties of the press-fit pin are determined by the small scale three-point bending. The friction coefficient of the pin in the TH is successfully determined from the load-displacement relationship of the pin during press-fit assembly. The validity of the determined parameters is to be clarified by conducting the press-fit assemblies into the holes with different diameters. By comparing the damaged area of the printed circuit boards after assembly and the stress distributions obtained numerically, the failure stress of the board is determined. Finally, both the retention force of the pin and the damage of the printed circuit board after assembly become possible to be predicted by the numerical analysis.

Analysis of Solderless Press-Fit Interconnections During the Assembly Process

2008 ◽  
Vol 130 (3) ◽  
Author(s):  
Hironori Tohmyoh ◽  
Kiichiro Yamanobe ◽  
Masumi Saka ◽  
Jiro Utsunomiya ◽  
Takeshi Nakamura ◽  
...  
Keyword(s):  
Printed Circuit Boards ◽  
Small Scale ◽  
Assembly Process ◽  
Circuit Boards ◽  
Element Analysis ◽  
Plastic Properties ◽  
Printed Circuit ◽  
Elastic Plastic ◽  
Press Fit ◽  
The Press

This paper deals with typical mechanical problems that are encountered in a solderless press-fit assembly process. First, the elastic-plastic properties of two types of press-fit pins and the friction coefficients of the pins in thin plated through holes are determined both experimentally and by three-dimensional finite element analysis. The elastic-plastic properties of the press-fit pins are determined by small-scale testing under three-point bending. The coefficients of friction of the pins in the through holes are successfully determined from the load-displacement relationships of the pins during press-fit assembly processes. The validity of the parameters that are determined is clarified by inserting the press-fit pins into holes of different diameters. By comparing the damaged areas of the printed circuit boards after assembly and the numerically obtained stress distributions, the failure stress of the boards is determined. Finally, both the retention force of the pins and the degree of damage to the printed circuit boards after assembly are predicted by numerical analysis.

Dielectric Breakdown in Printed Circuit Boards at Elevated Temperatures

1996 ◽  
Author(s):  
P. Singh ◽  
G.T. Galyon ◽  
J. Obrzut ◽  
W.A. Alpaugh
Keyword(s):  
Experimental Data ◽  
Thermal Degradation ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Elevated Temperatures ◽  
Dielectric Breakdown ◽  
Circuit Board ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Data Matching

Abstract A time delayed dielectric breakdown in printed circuit boards, operating at temperatures below the epoxy resin insulation thermo-electrical limits, is reported. The safe temperature-voltage operating regime was estimated and related to the glass-rubber transition (To) of printed circuit board dielectric. The TG was measured using DSC and compared with that determined from electrical conductivity of the laminate in the glassy and rubbery state. A failure model was developed and fitted to the experimental data matching a localized thermal degradation of the dielectric and time dependency. The model is based on localized heating of an insulation resistance defect that under certain voltage bias can exceed the TG, thus, initiating thermal degradation of the resin. The model agrees well with the experimental data and indicates that the failure rate and truncation time beyond which the probability of failure becomes insignificant, decreases with increasing glass-rubber transition temperature.

scholarly journals Estimating Recycling Return of Integrated Circuits Using Computer Vision on Printed Circuit Boards

2021 ◽  
Vol 11 (6) ◽  
pp. 2808
Author(s):  
Leandro H. de S. Silva ◽  
Agostinho A. F. Júnior ◽  
George O. A. Azevedo ◽  
Sergio C. Oliveira ◽  
Bruno J. T. Fernandes
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Electronic Waste ◽  
Decision Criterion ◽  
Economic Feasibility ◽  
Electronic Equipment ◽  
Circuit Board ◽  
Mechanical Recycling ◽  
Printed Circuit

The technological growth of the last decades has brought many improvements in daily life, but also concerns on how to deal with electronic waste. Electrical and electronic equipment waste is the fastest-growing rate in the industrialized world. One of the elements of electronic equipment is the printed circuit board (PCB) and almost every electronic equipment has a PCB inside it. While waste PCB (WPCB) recycling may result in the recovery of potentially precious materials and the reuse of some components, it is a challenging task because its composition diversity requires a cautious pre-processing stage to achieve optimal recycling outcomes. Our research focused on proposing a method to evaluate the economic feasibility of recycling integrated circuits (ICs) from WPCB. The proposed method can help decide whether to dismantle a separate WPCB before the physical or mechanical recycling process and consists of estimating the IC area from a WPCB, calculating the IC’s weight using surface density, and estimating how much metal can be recovered by recycling those ICs. To estimate the IC area in a WPCB, we used a state-of-the-art object detection deep learning model (YOLO) and the PCB DSLR image dataset to detect the WPCB’s ICs. Regarding IC detection, the best result was obtained with the partitioned analysis of each image through a sliding window, thus creating new images of smaller dimensions, reaching 86.77% mAP. As a final result, we estimate that the Deep PCB Dataset has a total of 1079.18 g of ICs, from which it would be possible to recover at least 909.94 g of metals and silicon elements from all WPCBs’ ICs. Since there is a high variability in the compositions of WPCBs, it is possible to calculate the gross income for each WPCB and use it as a decision criterion for the type of pre-processing.

Evaluation of new technologies and materials for printed circuit boards with improved heat dissipation properties

Circuit World ◽  
2016 ◽  
Vol 42 (1) ◽  
pp. 32-36 ◽  
Author(s):  
Michal Baszynski ◽  
Edward Ramotowski ◽  
Dariusz Ostaszewski ◽  
Tomasz Klej ◽  
Mariusz Wojcik ◽  
...  
Keyword(s):  
Thermal Properties ◽  
Printed Circuit Boards ◽  
Heat Dissipation ◽  
Printed Circuit Board ◽  
New Technologies ◽  
Electronic Device ◽  
Circuit Board ◽  
New Materials ◽  
Content Type ◽  
Printed Circuit

Purpose – The purpose of this paper is to evaluate thermal properties of printed circuit board (PCB) made with use of new materials and technologies. Design/methodology/approach – Four PCBs with the same layout but made with use of different materials and technologies have been investigated using thermal camera to compare their thermal properties. Findings – The results show how important the thermal properties of PCBs are for providing effective heat dissipation, and how a simple alteration to the design can help to improve the thermal performance of electronic device. Proper layout, new materials and technologies of PCB manufacturing can significantly reduce the temperature of electronic components resulting in higher reliability of electronic and power electronic devices. Originality/value – This paper shows the advantages of new technologies and materials in PCB thermal management.

scholarly journals A Study on the Radiated Susceptibility of Printed Circuit Boards and the Effects of Via Fencing

Electronics ◽  
2021 ◽  
Vol 10 (5) ◽  
pp. 539
Author(s):  
Ryan P. Tortorich ◽  
William Morell ◽  
Elizabeth Reiner ◽  
William Bouillon ◽  
Jin-Woo Choi
Keyword(s):  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Ground Plane ◽  
Circuit Board ◽  
Electronic Systems ◽  
Coupling Mechanism ◽  
Electromagnetic Modeling ◽  
Printed Circuit ◽  
Edge Radiation ◽  
Area Of Concern

Because modern electronic systems are likely to be exposed to high intensity radiated fields (HIRF) environments, there is growing interest in understanding how electronic systems are affected by such environments. Backdoor coupling in particular is an area of concern for all electronics, but there is limited understanding about the mechanisms behind backdoor coupling. In this work, we present a study on printed circuit board (PCB) backdoor coupling and the effects of via fencing. Existing work focuses on ideal stackups and indicates that edge radiation is significantly reduced by via fencing. In this study, both full wave electromagnetic modeling and experimental verification are used to investigate both ideal and practical PCB stackups. In the ideal scenario, we find that via fencing substantially reduces coupling, which is consistent with prior work on emissions. In the practical scenario, we incorporate component footprints and traces which naturally introduce openings in the top ground plane. Both simulation and experimental data indicate that via fencing in the practical scenario does not substantially mitigate coupling, suggesting that PCB edge coupling is not the dominant coupling mechanism, even at varying angles of incidence and polarization.

Digitalization of production in Altium Designer software

2021 ◽  
pp. 34-42
Author(s):  
S. S. Yudachev ◽  
S. S. Sitnikov ◽  
F. M. Bosy
Keyword(s):  
Printed Circuit Boards ◽  
Electronic Device ◽  
Educational Institution ◽  
Three Dimensional ◽  
Electrical Circuit ◽  
Circuit Board ◽  
Practical Significance ◽  
Three Dimensional Model ◽  
Printed Circuit ◽  
Higher Educational

A method for modeling and printed circuit board layout in the form of a 3D model in one of the digital solutions designed for this task, Altium Designer, is proposed. The practical significance of the work is the study of the basic software libraries in terms of their creation, filling and application when working with the project, as well as of the algorithm for constructing an electrical circuit in the Altium Designer program, layout and design of the simplest circuit on the board. In the course of the work, the algorithm and rules for creating a library of three-dimensional models of components, a library containing conditional graphic designations of the corresponding components, a schematic diagram of the device, a three-dimensional model of the board and the construction of conducting tracks on it are described. The components and circuits used in the work are publicly available on the Internet, which allows anyone to work over the entire algorithm for studying and honing the skills of designing printed circuit boards, both by students studying at a higher educational institution and by fully-fledged specialists. This work can be used not only for teaching students in the field of electronic device development in terms of their design and for organizing laboratory work, but also for creating and designing real devices both in production and within a higher educational institution, for example, for creating a laboratory bench. The introduction and study of this software is carried out at the Department of Radio-Electronic Systems and Complexes of one of the leading engineering universities of the Russian Federation — the Bauman Moscow State Technical University.

Thermal Model of Printed Circuit Board Plated-Through Hole under One-Sided Heating Conditions

2021 ◽  
Vol 26 (5) ◽  
pp. 426-431
Author(s):  
V.A. Sergeev ◽  
◽  
A.M. Khodakov ◽  
M.Yu. Salnikov ◽  
◽  
...  
Keyword(s):  
Quality Control ◽  
Thermal Resistance ◽  
Thermal Model ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Thermal Models ◽  
Printed Circuit ◽  
Plated Through Hole ◽  
Through Hole

Thermal methods of quality control of the plated-through hole (PTH) of printed circuit board (PCB) are based on thermal models. However, known thermal models of PTH take no account of heat transfer to PCB material thus not allowing for PTH heat characteristic tying up with adhesion quality. In this work, an axisymmetric thermal model of a single-layer PCB PTH under one-sided heating conditions is considered. It was shown that the ratio of the temperature increments of the upper (heated) and lower end of the PTH in the considered range of heating power does not depend on the power level. A linear thermal equivalent scheme of the PTH has been proposed, which includes the longitudinal thermal resistance of the PTH metallization, de-termined by the parameters and quality of the metallization layer, the thermal resistance, which determines the convection heat exchange between the ends of the PTH with the adjacent PCB surface and the environment, and the thermal resistance of the area of the PCB material adjacent to the PTH, depending on the quality of the metallization adhesion and the PCB dielectric. Thermal equivalent circuit parameters determined by the ratio of the temperature increment of the upper and lower ends of the PTH and their difference can serve as the basis for the development of a nondestructive inspection procedure for PTH quality control by way of its unilateral heating, for example, by a laser beam.

Hierarchical pyramidal subsampling in deep convolutional networks for visual pattern recognition

2021 ◽  
Author(s):  
A. E. Averyanikhin ◽  
A. I. Vlasov ◽  
E. V. Evdokimova
Keyword(s):  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Flaw Detection ◽  
Input Image ◽  
Circuit Board ◽  
Digital Data ◽  
Deep Convolutional Neural Networks ◽  
Size Scale ◽  
Printed Circuit ◽  
Convolutional Networks

The main problem of known deep convolutional neural networks (CNN) is that they require a fixed-size input image. This requirement is “artificial” and can reduce recognition accuracy for images or its parts of arbitrary size/scale. The paper proposes a strategy of combining “hierarchical pyramidal subselection” to eliminate the above restriction. The structure of the neural network using the proposed combining strategy allows the generation of prediction regardless of the size/scale of the original image, and also improves the accuracy of recognition. Features of application of CNN for identification and recognition of defects of conducting pattern of printed circuit board blanks have been considered. Features of defects of conductive pattern of printed circuit board blanks have been briefly discussed. The invention proposes the use of artificial CNN, which have advantages in speed and accuracy in solving problems of object recognition on images relative to existing methods. The focus is on the architecture of CNN using hierarchical pyramidal subselection. Capabilities of application of CNN for recognition of defects of conducting pattern of printed circuit board blanks have been shown. Proposed method of hierarchical pyramidal subselection in deep convolutional networks has been implemented in software complex, which allows processing digital data of photographs of conducting pattern of printed circuit boards, in particular during their flaw detection, and can be used for localization of existing defects of conducting pattern. The conclusion draws the possibilities of using methods and means of image processing in flaw detection of radio-electronic equipment and instruments

scholarly journals Optimization Studies on Recovery of Metals from Printed Circuit Board Waste

2018 ◽  
Vol 2018 ◽  
pp. 1-10 ◽  
Author(s):  
P. Sivakumar ◽  
D. Prabhakaran ◽  
M. Thirumarimurugan
Keyword(s):  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Lead Nitrate ◽  
Acid Leaching ◽  
Circuit Board ◽  
Copper Recovery ◽  
Printed Circuit ◽  
Waste Printed Circuit Boards ◽  
Electrode Combination ◽  
Lead Metal

The aim of the study was to recover copper and lead metal from waste printed circuit boards (PCBs). The electrowinning method is found to be an effective recycling process to recover copper and lead metal from printed circuit board wastes. In order to simplify the process with affordable equipment, a simple ammonical leaching operation method was adopted. The selected PCBs were incinerated into fine ash powder at 500°C for 1 hour in the pyrolysis reactor. Then, the fine ash powder was subjected to acid-leaching process to recover the metals with varying conditions like acid-base concentration, electrode combination, and leaching time. The relative electrolysis solution of 0.1 M lead nitrate for lead and 0.1 M copper sulphate for copper was used to extract metals from PCBs at room temperature. The amount of lead and copper extracted from the process was determined by an atomic absorption spectrophotometer, and results found were 73.29% and 82.17%, respectively. Further, the optimum conditions for the recovery of metals were determined by using RSM software. The results showed that the percentage of lead and copper recovery were 78.25% and 89.1% should be 4 hrs 10 A/dm2.

scholarly journals A model for the reflection of terahertz signals from printed circuit board surfaces

2018 ◽  
Vol 10 (2) ◽  
pp. 179-186 ◽  
Author(s):  
Alexander Fricke ◽  
Mounir Achir ◽  
Philippe Le Bars ◽  
Thomas Kürner
Keyword(s):  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Simulated Annealing Algorithm ◽  
Specular Reflection ◽  
Circuit Board ◽  
Network Analyzer ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Propagation Modeling ◽  
Annealing Algorithm

AbstractBased on vector network analyzer Measurements, a model for the specular reflection behavior of printed circuit boards in the Terahertz range has been derived. It has been calibrated to suit the behavior of the measurements using a simulated annealing algorithm. The model has been tailored for integration to ray-tracing-based propagation modeling.

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