Modeling the Hotspot Temperature in AlGaN/GaN High Electron Mobility Transistors Using a Non-Gray Phonon BTE Solver

Author(s):  
Fatma Nazli Donmezer ◽  
Munmun Islam ◽  
Samuel Graham ◽  
Douglas Yoder

In this work, we utilize electron-phonon Monte Carlo simulations of AlGaN/GaN HEMTs to determine the energy loss rate of electrons in the channel of the transistor as a function of bias conditions. Intense energy transfer from electrons to phonons is observed near the gate edge on the drain side of such devices where the peak electric field exists. This intense energy exchange results in nanometer sized hotspots in the vicinity of the gate edge. In order to account for effects of ballistic phonon transport on temperature near the hotspots, a non-gray Discrete Ordinates Method (DOM) is used as a numerical solver for the phonon Boltzmann Transport Equation (BTE). The non-gray model accounts for dispersion effects of GaN by splitting the dispersion curve of GaN into a finite number of frequency bands. The phonons in each frequency band are assumed to have the same properties with the other phonons in the same band and the relaxation times between these bands are calculated. The results show how energy is redistributed among the available phonon bands and demonstrates which modes are most effective at transporting the thermal energy. Finally, the hotspot temperature predictions obtained by the model are compared to temperatures obtained by gray and continuum modeling approaches to show the discrepancies between different techniques.

2003 ◽  
Vol 764 ◽  
Author(s):  
B. Luo ◽  
F. Ren ◽  
M. A. Mastro ◽  
D. Tsvetkov ◽  
A. Pechnikov ◽  
...  

AbstractHigh quality undoped AlGaN/GaN high electron mobility transistors(HEMTs) structures have been gorwn by Hydride Vapor Phase Epitaxy (HVPE). The morphology of the films grown on Al2O3 substrates is excellent with root-mean-square roughness of ∼0.2nm over 10×10μm2 measurement area. Capacitance-voltage measurements show formation of dense sheet of charge at the AlGaN/GaN interface. HEMTs with 1μm gate length fabricated on these structures show transconductances in excess of 110 mS/mm and drain-source current above 0.6A/mm. Gate lag measurements show similar current collapse characteristics to HEMTs fabricated in MBE- or MOCVD grown material.


Author(s):  
Lény Baczkowski ◽  
Franck Vouzelaud ◽  
Dominique Carisetti ◽  
Nicolas Sarazin ◽  
Jean-Claude Clément ◽  
...  

Abstract This paper shows a specific approach based on infrared (IR) thermography to face the challenging aspects of thermal measurement, mapping, and failure analysis on AlGaN/GaN high electron-mobility transistors (HEMTs) and MMICs. In the first part of this paper, IR thermography is used for the temperature measurement. Results are compared with 3D thermal simulations (ANSYS) to validate the thermal model of an 8x125pm AIGaN/GaN HEMT on SiC substrate. Measurements at different baseplate temperature are also performed to highlight the non-linearity of the thermal properties of materials. Then, correlations between the junction temperature and the life time are also discussed. In the second part, IR thermography is used for hot spot detection. The interest of the system for defect localization on AIGaN/GaN HEMT technology is presented through two case studies: a high temperature operating life test and a temperature humidity bias test.


2021 ◽  
Vol 11 (15) ◽  
pp. 7057
Author(s):  
Lin Wang ◽  
Zhe Cheng ◽  
Zhi-Guo Yu ◽  
De-Feng Lin ◽  
Zhe Liu ◽  
...  

Half-bridge modules with integrated GaN high electron mobility transistors (HEMTs) and driver dies were designed and fabricated in this research. Our design uses flip-chip technology for fabrication, instead of more generally applied wire bonding, to reduce parasitic inductance in both the driver-gate and drain-source loops. Modules were prepared using both methods and the double-pulse test was applied to evaluate and compare their switching characteristics. The gate voltage (Vgs) waveform of the flip-chip module showed no overshoot during the turn-on period, and a small oscillation during the turn-off period. The probabilities of gate damage and false turn-on were greatly reduced. The inductance in the drain-source loop of the module was measured to be 3.4 nH. The rise and fall times of the drain voltage (Vds) were 12.9 and 5.8 ns, respectively, with an overshoot of only 4.8 V during the turn-off period under Vdc = 100 V. These results indicate that the use of flip-chip technology along with the integration of GaN HEMTs with driver dies can effectively reduce the parasitic inductance and improve the switching performance of GaN half-bridge modules compared to wire bonding.


2021 ◽  
pp. 108050
Author(s):  
Maria Glória Caño de Andrade ◽  
Luis Felipe de Oliveira Bergamim ◽  
Braz Baptista Júnior ◽  
Carlos Roberto Nogueira ◽  
Fábio Alex da Silva ◽  
...  

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