Lead-Free Flip Chip Assembly

Author(s):  
Sunil Gopakumar ◽  
Vinodh Poyyapakkam ◽  
Dan Blass ◽  
Peter Borgesen ◽  
K. Srihari

It is well established that Pb free alloys tend to solder less readily than Sn/Pb. It is not clear that this is always a major problem, but two factors combine to make it more of a concern for flip chip than for other applications. Not surprisingly, wetting and spreading appears to become less effective as the solder volume is reduced and a larger fraction of it is near the surface. At the same time assembly yields tend to become more sensitive to this. The present paper addresses the assembly of flip chips with Sn/Ag/Cu bumps onto Ni/Au and OSP coated copper pads on organic substrates. Soldering defects observed included incomplete wetting and collapse, as well as poor self centering. The sensitivity to fluxes, reflow profiles, and substrate pads were investigated and potential consequences for assembly yields calculated numerically.

2006 ◽  
Vol 3 (1) ◽  
pp. 12-21
Author(s):  
Raghunandan Chaware ◽  
Leon Stiborek ◽  
Jeremias Libres ◽  
Manots Marquez ◽  
Charles Odegard ◽  
...  

The quality and reliability of flip-chip assembly is severely impacted by the compatibility between various materials used in the package. Currently, no-clean fluxes are widely used for the assembly of flip chips. Poor compatibility between the flux residue and the underfill can lead to the formation of voids, and consequently, reliability problems. Therefore, a major concern for flip-chip assembly is the compatibility between the flux residues and the underfill. The principal objective of this research was to develop a flux for lead-free packaging, which would be compatible with high performance moisture resistant cyanate ester-based underfills. During this study, commercially available fluxes, along with tailor made epoxy-based flux, were tested for their compatibility with the underfill. The results indicated that the assembly process window for the rosin-based fluxes was much wider than the epoxy-based fluxes. Synthetic flux had poor soldering performance and relatively poor compatibility with the cyanate ester underfill than rosin-based flux. Epoxy flux exhibited narrow process window and the soldering performance was sensitive to flux thickness, reflow profile, substrate pad surface finish and topography. For smaller packages with die size of 10 mm by 10 mm, the compatibility between the cyanate ester underfill and the different fluxes was comparable. However, for the packages with die size of 22 mm by 22 mm, the compatibility between the epoxy-based flux and the cyanate ester underfill was relatively better than that with the other two flux chemistries.


2015 ◽  
Vol 2015 (1) ◽  
pp. 000799-000805
Author(s):  
Marek Gorywoda ◽  
Rainer Dohle ◽  
Bernd Kandler ◽  
Bernd Burger

Electromigration comprises one of the processes affecting the long-term reliability of electronic devices; it has therefore been the focus of many investigations in recent years. In regards to flip chip packaging technology, the majority of published data is concerned with electromigration in solder connections to metallized organic substrates. Hardly any information is available in the literature on electromigration in lead-free solder connections on thin film ceramic substrates. This work presents results of a study of electromigration in lead-free (SAC305) flip chip solder bumps with a nominal diameter of 40 μm or 30 μm with a pitch of 100 μm on silicon chips assembled onto thin film Al2O3 ceramic substrates. The under bump metallization (UBM) comprised of a 5 μm thick electroless nickel immersion gold (ENIG) layer directly deposited on the AlCu0.5 trace. The ceramic substrates were metallized using a thin film multilayer (NiCr-Au(1.5 μm)-Ni(2 μm) structure on the top of which wettable areas were produced with high precision by depositing flash Au (60 nm) of the required diameter (40 μm or 30 μm). All electromigration tests were performed at the temperature of 125 °C. Initially, one chip assembly with 40 μm and one with 30 μm solder bumps was loaded with the current density of 8 kA/cm2 for 1,000 h. The assemblies did not fail and an investigation with SEM revealed no significant changes to the microstructure of the bumps. Thereafter seven chip assemblies with 40 μm solder bumps and five assemblies with 30 μm bumps were subjected to electromigration tests of 14 kA/cm2 or 25 kA/cm2, respectively. Six of the 40 μm-assemblies failed after 7,000 h and none of the 30 μm-assemblies failed after 2,500 h of test duration so far. Investigation of failed samples performed with SEM and EDX showed asymmetric changes of microstructure in respect to current flow. Several intermetallic phases were found to form in the solder. The predominant damage of the interconnects was found to occur at the cathode contact to chip; the Ni-P layers there showed typical columnar Kirkendall voids caused by migration of Ni from the layers into the solder. Failure of the contacts apparently occurred at the interface between Ni-P and solder. In summary, the results of the study indicate a very high stability of lead-free solder connections on ceramic substrates against electromigration. This high stability is primarily due to a better heat dissipation and thus to a relatively low temperature increase of the ceramic packages caused by resistive heating during flow of electric current. In addition, the type of the metallization used in the study seems to be more resistant to electromigration than the standard PCB metallization as it does not contain a copper layer.


2012 ◽  
Vol 2012 (1) ◽  
pp. 000891-000905 ◽  
Author(s):  
Rainer Dohle ◽  
Stefan Härter ◽  
Andreas Wirth ◽  
Jörg Goßler ◽  
Marek Gorywoda ◽  
...  

As the solder bump sizes continuously decrease with scaling of the geometries, current densities within individual solder bumps will increase along with higher operation temperatures of the dies. Since electromigration of flip-chip interconnects is highly affected by these factors and therefore an increasing reliability concern, long-term characterization of new interconnect developments needs to be done regarding the electromigration performance using accelerated life tests. Furthermore, a large temperature gradient exists across the solder interconnects, leading to thermomigration. In this study, a comprehensive overlook of the long-term reliability and analysis of the achieved electromigration performance of flip-chip test specimen will be given, supplemented by an in-depth material science analysis. In addition, the challenges to a better understanding of electromigration and thermomigration in ultra fine-pitch flip-chip solder joints are discussed. For all experiments, specially designed flip-chips with a pitch of 100 μm and solder bump diameters of 30–60 μm have been used [1]. Solder spheres can be made of every lead-free alloy (in our case SAC305) and are placed on a UBM which has been realized for our test chips in an electroless nickel process [2]. For the electromigration tests within this study, multiple combinations of individual current densities and temperatures were adapted to the respective solder sphere diameters. Online measurements over a time period up to 10,000 hours with separate daisy chain connections of each test coupon provide exact lifetime data during the electromigration tests. As failure modes have been identified: UBM consumption at the chip side or depletion of the Nickel layer at the substrate side, interfacial void formation at the cathode contact interface, and - to a much lesser degree - Kirkendall-like void formation at the anode side. A comparison between calculated life time data using Weibull distribution and lognormal distribution will be given.


Author(s):  
Muthiah Venkateswaran ◽  
Peter Borgesen ◽  
K. Srihari

Electrically conductive adhesives are emerging as a lead free, flux less, low temperature alternative to soldering in a variety of electronics and optoelectronics applications. Some of the potential benefits are obvious, but so far the adhesives have some limitations as well. The present work offers a critical evaluation of one approach to flip chip assembly, which lends itself particularly well to use with a high speed placement machine. Wafers were bumped by stencil printing of a thermoset conductive adhesive, which was then fully cured. In assembly, the conductive adhesive paste was stencil printed onto the pads of a printed circuit board and cured after die placement. The printing process was optimized to ensure robust assembly and the resulting reliability assessed.


Author(s):  
B. Senthil Kumar ◽  
Bayaras Abito Danila ◽  
Chong Mei Hoe Joanne ◽  
Zhang Rui Fen ◽  
Santosh Kumar Rath ◽  
...  

Author(s):  
Hua Lu ◽  
Chris Bailey

Traditionally, before flip chips can be assembled the dies have to be attached with solder bumps. This process involves the deposition of metal layers on the Al pads on the dies and this is called the under bump metallurgy (UBM). In an alternative process, however, Copper (Cu) columns can be used to replace solder bumps and the UBM process may be omitted altogether. After the bumping process, the bumped dies can be assembled on to the printed circuit board (PCB) by using either solder or conductive adhesives. In this work, the reliability issues of flip chips with Cu column bumped dies have been studied. The flip chip lifetime associated with the solder fatigue failure has been modeled for a range of geometric parameters. The relative importance of these parameters is given and solder volume has been identified as the most important design parameter for long-term reliability. Another important problem that has been studied in this work is the dissolution of protection metals on the pad and Cu column in the reflow process. For small solder joints the amount of Cu which dissolves into the molten solder after the protection layers have worn out may significantly affect solder joint properties.


1999 ◽  
Vol 563 ◽  
Author(s):  
E. S. Drexler

AbstractThe mismatch between the coefficients of thermal expansion of silicon chips and their organic substrates has been mitigated through the practice of using underfill in flip-chip packages. Yet solder fatigue and package failures still occur. This is particularly true for flip-chips on organic substrates that are thermally cycled between low (−55 °C) and high temperatures (125 °C). In this study, I used electron-beam moir6 to measure displacements and calculate strains in a solderball contained in a flip-chip plastic-ball grid array package. A crossed-line grating with a pitch of 450 nm was used to allow detailed measurements of the local displacements from a cross section of a flip-chip package. Elastic displacements were observed and measured, and the v-field displacements, out of the plane of the chip, were more significant than the shear or u-field, in the plane of the chip, displacements. Larger v-field displacements were measured near the center of the silicon chip than at the edge of the chip.


Author(s):  
Valtemar F Cardoso ◽  
Ana Neilde R. da Silva ◽  
Zaira M. Rocha ◽  
Antonio Carlos Seabra ◽  
Cecilia Jimenez-Jorquera ◽  
...  

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