System Level Design Optimization Method for Lightweight Manufacturable Design

2018 ◽  
Author(s):  
Michael Nucci ◽  
Graeme Sabiston ◽  
Christopher Carrick ◽  
Il Yong Kim
Keyword(s):  
Topology Optimization ◽  
Design Optimization ◽  
Optimization Method ◽  
System Level ◽  
System Level Design ◽  
Component Level ◽  
Roof Structure ◽  
Design Requirements ◽  
Level Design ◽  
Beam Component

This paper presents a method for a system level design optimization, using currently available commercial tools. A process outlining the optimization steps to be used was created based on performing topology optimization on important components and performing a conceptual topology optimization on the entire system. Using this process, a study was performed on a ceiling structure provided by an industry partner. From the design requirements, three primary areas were targeted for design optimization, the component level optimization of the cross beam component, the component level optimization of a roof attachment bracket, and the system level of the general roof structure. This study produced a design for the ceiling structure that reduced the total mass of the system by 34%, while also reducing the amount of total components in the system by 30%.

System-Level Design Optimization Method for Electrical Drive Systems—Robust Approach

2015 ◽  
Vol 62 (8) ◽  
pp. 4702-4713 ◽  
Author(s):  
Gang Lei ◽  
Tianshi Wang ◽  
Jianguo Zhu ◽  
Youguang Guo ◽  
Shuhong Wang
Keyword(s):  
Design Optimization ◽  
Optimization Method ◽  
System Level ◽  
System Level Design ◽  
Electrical Drive ◽  
Robust Approach ◽  
Level Design ◽  
Drive Systems

Optimized System-Level Design Methods for NoC-Based Many Core Embedded Systems

2014 ◽  
pp. 150-179
Author(s):  
Haoyuan Ying ◽  
Klaus Hofmann ◽  
Thomas Hollstein
Keyword(s):  
Embedded Systems ◽  
Design Optimization ◽  
Optimization Methods ◽  
Design Methods ◽  
System Level ◽  
System Level Design ◽  
Level Design ◽  
On Chip ◽  
Many Core

Due to the growing demand on high performance and low power in embedded systems, many core architectures are proposed the most suitable solutions. While the design concentration of many core embedded systems is switching from computation-centric to communication-centric, Network-on-Chip (NoC) is one of the best interconnect techniques for such architectures because of the scalability and high communication bandwidth. Formalized and optimized system-level design methods for NoC-based many core embedded systems are desired to improve the system performance and to reduce the power consumption. In order to understand the design optimization methods in depth, a case study of optimizing many core embedded systems based on 3-Dimensional (3D) NoC with irregular vertical link distribution topology through task mapping, core placement, routing, and topology generation is demonstrated in this chapter. Results of cycle-accurate simulation experiments prove the validity and efficiency of the design methods. Specific to the case study configuration, in maximum 60% vertical links can be saved while maintaining the system efficiency in comparison to full vertical link connection 3D NoCs by applying the design optimization methods.

Interconnect modeling for improved system-level design optimization

2008 ◽  
Author(s):  
Luca Carloni ◽  
Andrew B. Kahng ◽  
Swamy Muddu ◽  
Alessandro Pinto ◽  
Kambiz Samadi ◽  
...  
Keyword(s):  
Design Optimization ◽  
System Level ◽  
System Level Design ◽  
Interconnect Modeling ◽  
Level Design
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