Identifying Culprits When Probabilistic Verification Fails

2012 ◽  
Author(s):  
David J. Musliner ◽  
Timothy Woods ◽  
John Maraist
Keyword(s):  
Accurate Diagnosis ◽  
Automatic Design ◽  
Probabilistic Verification ◽  
Execution Traces ◽  
Verification Tools ◽  
Single Trace ◽  
Property Verification ◽  
Formal Requirements ◽  
Verification Techniques ◽  
Probabilistic Property

Automatic design verification techniques are intended to check that a particular system design meets a set of formal requirements. When the system does not meet the requirements, some verification tools can perform culprit identification to indicate which design components contributed to the failure. With non-probabilistic verification, culprit identification is straightforward: the verifier returns a counterexample trace that shows how the system can evolve to violate the desired property, and any component involved in that trace is a potential culprit. For probabilistic verification, the problem is more complicated, because no single trace constitutes a counterexample. Given a set of execution traces that collectively refute a probabilistic property, how should we interpret those traces to find which design components are primarily responsible? This paper discusses an approach to this problem based on decision-tree learning. Our solution provides rapid, scalable, and accurate diagnosis of culprits from execution traces. It rejects distractions and accurately focuses attention on the components that primarily cause a property verification to fail.

scholarly journals Fast equivalence -- checking for quantum circuits

2010 ◽  
Vol 10 (9&10) ◽  
pp. 721-734
Author(s):  
Shigeru Yamashita ◽  
Igor L. Markov
Keyword(s):  
Formal Verification ◽  
Quantum Algorithms ◽  
Quantum Circuits ◽  
Equivalence Checking ◽  
Sat Solvers ◽  
Reversible Circuits ◽  
Verification Tools ◽  
Verification Methodology ◽  
Verification Techniques ◽  
Factoring Algorithm

We perform formal verification of quantum circuits by integrating several techniques specialized to particular classes of circuits. Our verification methodology is based on the new notion of a reversible miter that allows one to leverage existing techniques for simplification of quantum circuits. For reversible circuits which arise as runtime bottlenecks of key quantum algorithms, we develop several verification techniques and empirically compare them. We also combine existing quantum verification tools with the use of SAT-solvers. Experiments with circuits for Shor's number-factoring algorithm, containing thousands of gates, show improvements in efficiency by four orders of magnitude.

scholarly journals Invariants and Robustness of BIP Models

10.29007/prxp ◽  
2018 ◽  
Author(s):  
Jan Olaf Blech ◽  
Thanh-Hung Nguyen ◽  
Michael Perin
Keyword(s):  
Embedded Systems ◽  
Higher Order ◽  
Theorem Prover ◽  
Important Goal ◽  
Invariant Generation ◽  
Execution Traces ◽  
Verification Tool ◽  
Verification Tools ◽  
Generation Mechanisms ◽  
Natural Way

In this paper we present on-going work addressing the problem of automatically generating realistic and guaranteed correct invariants. Since invariant generation mechanisms are error-prone, after the computation of invariants by a verification tool, we formally prove that the generated invariants are indeed invariants of the considered systems using a higher-order theorem prover and automated techniques. We regard invariants for BIP models. BIP (behavior, interaction, priority) is a language for specifying asynchronous component based systems. Proving that an invariant holds often requires an induction on possible system execution traces. For this reason, apart from generating invariants that precisely capture a system’s behavior, inductiveness of invariants is an important goal. We establish a notion of robust BIP models. These can be automatically constructed from our original non-robust BIP models and over-approximate their behavior. We motivate that invariants of robust BIP models capture the behavior of systems in a more natural way than invariants of corresponding non-robust BIP models. Robust BIP models take imprecision due to values delivered by sensors into account. Invariants of robust BIP models tend to be inductive and are also invariants of the original non-robust BIP model. Therefore they may be used by our verification tools and it is easy to show their correctness in a higher-order theorem prover. The presented work is developed to verify the results of a deadlock-checking tool for embedded systems after their computations. Therewith, we gain confidence in the provided analysis results.

Industrial Experiments in IMS, ATC, and SDR Projects of Property Verification Techniques

2014 ◽  
pp. 455-468
Author(s):  
Emmanuel Gaudin
Keyword(s):  
Modeling Languages ◽  
Critical Systems ◽  
Research Projects ◽  
Safety Critical ◽  
Industrial Experiments ◽  
Representative Model ◽  
Safety Critical Systems ◽  
Paris Region ◽  
Property Verification ◽  
Verification Techniques

The increasing complexity of embedded systems calls for verification techniques to make sure the systems behave properly. When it comes to safety-critical systems, this aspect is even more relevant and is now taken into consideration by certification authorities. For that matter, property verification is accepted to be done not only on the system itself but also on a representative model of the system. This chapter first introduces the different properties and how they could be expressed. Then associated modeling languages characteristics are discussed to describe the systems on which the properties can be verified. Finally, different technologies to verify the properties are presented, including some practical examples and existing tools. This last part is illustrated by several research projects such as the PRESTO ARTEMIS European project and the exoTICus System@tic Paris Region competitiveness cluster project.

scholarly journals Difference Verification with Conditions

2020 ◽  
pp. 133-154
Author(s):  
Dirk Beyer ◽  
Marie-Christine Jakobs ◽  
Thomas Lemberger
Keyword(s):  
Open Problem ◽  
Software Verification ◽  
Development Process ◽  
Proof Of Concept ◽  
Software Projects ◽  
Change Analysis ◽  
Extensive Evaluation ◽  
Development Processes ◽  
Verification Tools ◽  
Verification Techniques

Abstract Modern software-verification tools need to support development processes that involve frequent changes. Existing approaches for incremental verification hard-code specific verification techniques. Some of the approaches must be tightly intertwined with the development process. To solve this open problem, we present the concept of difference verification with conditions. Difference verification with conditions is independent from any specific verification technique and can be integrated in software projects at any time. It first applies a change analysis that detects which parts of a software were changed between revisions and encodes that information in a condition. Based on this condition, an off-the-shelf verifier is used to verify only those parts of the software that are influenced by the changes. As a proof of concept, we propose a simple, syntax-based change analysis and use difference verification with conditions with three off-the-shelf verifiers. An extensive evaluation shows the competitiveness of difference verification with conditions.

Panellist position statement: some industrial experience with program verification

2005 ◽  
Vol 363 (1835) ◽  
pp. 2393-2394
Author(s):  
Roderick Chapman
Keyword(s):  
Software Engineering ◽  
Formal Methods ◽  
Programming Language ◽  
Program Verification ◽  
Position Statement ◽  
Software Systems ◽  
Engineering Company ◽  
Verification Tools ◽  
High Integrity ◽  
Verification Techniques

As the only obvious ‘industrial’ member of the panel, I would like to introduce myself and the work I am involved with. Praxis is a practising software engineering company that is well known for applying so-called ‘Formal Methods’ in the development of high-integrity software system. We are also responsible for the Spark programming language and verification tools ( John Barnes with Praxis High Integrity Systems 2003 ). Spark remains one of the very few technologies to offer a sound verification system for an industrially usable imperative programming language. Despite the popular belief that ‘no one does formal methods’, we (and our customers) regularly employ strong verification techniques on industrial-scale software systems. I would like to address three main points:

Coding for Evaluation and Treatment

2008 ◽  
Vol 18 (1) ◽  
pp. 9-20 ◽  
Author(s):  
Mark Kander ◽  
Steve White
Keyword(s):  
Medical Record ◽  
Treatment Session ◽  
Accurate Diagnosis ◽  
Third Party ◽  
Speech Language Pathologists ◽  
Adequate Information ◽  
Diagnosis Codes ◽  
Coding Rules ◽  
Procedure Codes ◽  
The Web

Abstract This article explains the development and use of ICD-9-CM diagnosis codes, CPT procedure codes, and HCPCS supply/device codes. Examples of appropriate coding combinations, and Coding rules adopted by most third party payers are given. Additionally, references for complete code lists on the Web and a list of voice-related CPT code edits are included. The reader is given adequate information to report an evaluation or treatment session with accurate diagnosis, procedure, and supply/device codes. Speech-language pathologists can accurately code services when given adequate resources and rules and are encouraged to insert relevant codes in the medical record rather than depend on billing personnel to accurately provide this information. Consultation is available from the Division 3 Reimbursement Committee members and from [email protected] .

Premalignant and Malignant Lesions of the Heterotopic Pancreas in the Esophagus: a Case Report and Review of the Literature

2015 ◽  
Vol 24 (2) ◽  
pp. 235-239 ◽  
Author(s):  
Jan Ulrych ◽  
Vladimir Fryba ◽  
Helena Skalova ◽  
Zdenek Krska ◽  
Tomas Krechler ◽  
...  
Keyword(s):  
Case Report ◽  
Gastrointestinal Tract ◽  
Unusual Case ◽  
Accurate Diagnosis ◽  
Heterotopic Pancreas ◽  
Premalignant Lesions ◽  
Resected Specimen ◽  
Review Of The Literature ◽  
Severe Dysphagia ◽  
Malignant Lesions

Heterotopic pancreas is a congenital pathology of the gastrointestinal tract, particularly rare in the esophagus. Both symptomatology and findings during preoperative examinations are non-specific and therefore do not often lead to an accurate diagnosis, which is usually revealed only by histopathological assessment of a resected specimen. We report an unusual case of a patient suffering from severe dysphagia caused by heterotopic pancreas in the distal esophagus with chronic inflammation and foci of premalignant changes. This article also reviews 14 adult cases of heterotopic pancreas in the esophagus previously reported in the literature, with the aim of determining the clinical features of this disease and possible complications including rare premalignant lesions and malignant transformation. Especially with regard to those complications, we suggest that both symptomatic and incidentally found asymptomatic lesions should be resected.

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