Monitoring Solar Home Systems With Pulse Width Modulation Charge Control

2011 ◽  
Vol 133 (2) ◽  
Author(s):  
Nathaniel J. Williams ◽  
E. Ernest van Dyk ◽  
Frederik J. Vorster

With the high cost of grid extension and approximately 1.6 billion people still living without electrical services, the solar home system is an important technology in the alleviation of rural energy poverty across the developing world. The performance monitoring and analysis of these systems provide insights leading to improvements in system design and implementation in order to ensure high quality and robust energy supply in remote locations. Most small solar home systems now use charge controllers using pulse width modulation (PWM) to regulate the charge current to the battery. A rapid variation in current and voltage resulting from PWM creates monitoring challenges, which, if not carefully considered in the design of the monitoring system, can result in the erroneous measurement of photovoltaic (PV) power. In order to characterize and clarify the measurement process during PWM, a mathematical model was developed to reproduce and simulate measured data. The effects of matched scan and PWM frequency were studied with the model, and an algorithm was devised to select appropriate scan rates to ensure that a representative sample of measurements is acquired. Furthermore, estimation methods were developed to correct for measurement errors due to factors such as nonzero “short circuit” voltage and current/voltage peak mismatches. A more sophisticated algorithm is then discussed to more accurately measure PV power using highly programmable data loggers. The results produced by the various methods are compared and reveal a significant error in the measurement of PV power without corrective action. Estimation methods prove to be effective in certain cases but are susceptible to error during conditions of variable irradiance. The effect of the measurement error has been found to depend strongly on the duty cycle of PWM as well as the relationship between scan rate and PWM frequency. The energy measurement error over 1 day depends on insolation and system conditions as well as on system design. On a sunny day, under a daily load of about 20 A h, the net error in PV energy is found to be 1%, whereas a system with a high initial battery state of charge under similar conditions and no load produced an error of 47.6%. This study shows the importance of data logger selection and programming in monitoring accurately the energy provided by solar home systems. When appropriately considered, measurement errors can be avoided or reduced without investment in more expensive measurement equipment.

1999 ◽  
Vol 56 (7) ◽  
pp. 1234-1240
Author(s):  
W R Gould ◽  
L A Stefanski ◽  
K H Pollock

All catch-effort estimation methods implicitly assume catch and effort are known quantities, whereas in many cases, they have been estimated and are subject to error. We evaluate the application of a simulation-based estimation procedure for measurement error models (J.R. Cook and L.A. Stefanski. 1994. J. Am. Stat. Assoc. 89: 1314-1328) in catch-effort studies. The technique involves a simulation component and an extrapolation step, hence the name SIMEX estimation. We describe SIMEX estimation in general terms and illustrate its use with applications to real and simulated catch and effort data. Correcting for measurement error with SIMEX estimation resulted in population size and catchability coefficient estimates that were substantially less than naive estimates, which ignored measurement errors in some cases. In a simulation of the procedure, we compared estimators from SIMEX with "naive" estimators that ignore measurement errors in catch and effort to determine the ability of SIMEX to produce bias-corrected estimates. The SIMEX estimators were less biased than the naive estimators but in some cases were also more variable. Despite the bias reduction, the SIMEX estimator had a larger mean squared error than the naive estimator for one of two artificial populations studied. However, our results suggest the SIMEX estimator may outperform the naive estimator in terms of bias and precision for larger populations.


Electronics ◽  
2020 ◽  
Vol 9 (12) ◽  
pp. 2195
Author(s):  
Jin-Wook Kang ◽  
Seung-Wook Hyun ◽  
Yong Kan ◽  
Hoon Lee ◽  
Jung-Hyo Lee

This paper proposes a novel pulse width modulation (PWM) for a three-level neutral point clamped (NPC) voltage source inverter (VSI). When the conventional PWM method is used in three-level NPC VSI, dead time is required to prevent a short circuit caused by the operation of complementary devices on the upper and lower arms. However, current distortion is increased because of the dead time and it can also cause a voltage unbalance in the dc-link. To solve this problem, we propose a zero dead-time width modulation (ZDPWM) which does not require dead time used in complementary operation. The proposed technique applies the offset voltage to the space vector pulse width modulation (SVPWM) reference voltage for the same modulation index (MI) as the conventional SVPWM, but any complementary switching operation needs dead time. In addition, the proposed method is divided into four operation sections using the reference voltage and phase current to operate switching devices which flow the current depending on the section. This ZDPWM method is simply implemented by carrier and reference voltage that reduce the current distortion, because complementary operation that needs dead time is not implemented. However, the operation section is delayed due to the sampling delay that occurs during the experiment. Therefore, in this paper, we conduct a modeling of sampling delay to improve the delay of operation section. To verify the principle and feasibility of the proposed ZDPWM method, a simulation and experiment are implemented.


2021 ◽  
Author(s):  
Sukumar Patil ◽  
Bhanuprakash CV ◽  
Bhoopendrakumar Singh

Abstract This paperwork explains the design and development of isolated triple output dc-dc converter for military applications. Converter has designed with flyback topology with opto-coupler based feedback for regulated main output and regulators are used to provide another two outputs. It is realized with switching frequency of 190KHz (internal free run frequency) and can be able to operate up to 210KHz with external synchronization. LTM46xx micro-modules are used as buck regulators to provide required lower output voltages. Current mode pulse width modulation controller IC is used to drive the MOSFET switch. It has following features like inbuilt EMI filter, external inhibit function, external synchronization capability, input under voltage and over voltage protection, primary side over current, output over current and short circuit protection. Converter is designed to operate for wide input range from 18V to 36V with efficiency of more than 75% in full load conditions.


Author(s):  
Xuan-Vinh Le ◽  
Duc-Minh Nguyen ◽  
Viet-Anh Truong ◽  
Thanh-Hai Quach

In recent years, the quasi -switched boost inverter uses widely in electrical systems. This paper proposes a method to control the AC output voltage and reduce the current ripple of the booster inductor in the quasi-switched boost inverter (QSBI). The proposed technique base on carrier pulse width modulation with two triangles with phase shifts 90◦. This technique uses the offset function to expand the modulation index and the algorithm for output voltage stabilization based on the adjustment of the boost ratio. The modulation index expansion will reduce the stress voltage on the switches by an average of 16.5% under the simulated conditions. The boost factor base on the short circuit time on the DC / DC booster and the inverter on the zero vectors. So, the duty ratio (of the boost DC / DC) can reduce by the short-circuit pulses that insert in the position of zero vectors, so the inverter is responsible for both boosting and inverting. The combination helps to reduce the current ripple on the boost inductor. Besides that, reducing the short-circuit ratio of DC / DC booster will also reduce the capacity of the booster switch and thereby reduce the production cost. The analysis clarifies the proposed technique. Simulations and experiments evaluate the proposed method.


2013 ◽  
Vol 475-476 ◽  
pp. 1670-1673
Author(s):  
Shi Wei Lin

CNC constant voltage power is composed by the analog power circuit, MCU control circuit , pulse width modulation circuit, a power driver amplifier , analog to digital conversion circuit , the input voltage setting circuit and the output voltage display circuit. The power possesses the functions of digital regulator, high precision output, short-circuit & over-current protection and alarm functions, especially for a higher accuracy requirements for various occasions.


2013 ◽  
Vol 433-435 ◽  
pp. 1458-1462
Author(s):  
Gong Ding Bai ◽  
Jun Hua Liu ◽  
Wei Gang Shan ◽  
Bo Zhao ◽  
Xue Mei Zhang ◽  
...  

Permanent magnet synchronous motor (PMSM) now is widely used in hybrid vehicle drive area. When the space vector pulse width modulation (SVPWM) is used in PMSM control, the stator three phase currents must be collected for its control calculation. In this paper, a PMSM stator current collection system based on C8051F500 and AD7865 is designed, and proved to be effective with experiments.


Author(s):  
Yufeng Qi ◽  
Brian Surgenor

The paper describes an experimental investigation of pulse-width modulation (PWM) control of a pneumatic positioning system. PWM has been applied in the past to pneumatic positioning systems. But there are a number of different pneumatic circuit designs and PWM algorithms to choose from. This paper presents a new system design that is believed to be an improvement over previous pneumatic circuit and PWM algorithm designs. A single 3-position solenoid valve is used together with two manual flow control valves. The conventional PWM algorithm is modified with a dual switching gain to account for the valve characteristic. Test results indicate that the new system design can match the performance of previous designs. But careful consideration must be given to issues such as PWM carrier frequency and valve response times.


Author(s):  
Hussain Attia ◽  
Hang Seng Che ◽  
Tan Kheng Suan Freddy ◽  
Ahmad Elkhateb

The dead-time is necessary to be inserted between the gates drive pulses of the two power electronic switches in a one leg of any inverter to avoid a short circuit in the leg and the DC supply as well. However, adding the dead-time increases the low order harmonics of the output voltage/current waveform of the inverter. This paper investigates the positive effects of decreasing the pulse width modulation (PWM) drive pulses number per fundamental period on the current low order harmonics. In addition, this paper evaluates the impact of the confined band variable switching frequency pulse width modulation (CB-VSFPWM) technique on inverter performance in terms of dead-time mitigating, and consequenctely lowering the low order harmonics. CB-VSFPWM technique reduces the total harmonic distortion (THD) levels in the inverter output current as well. Theoretical analysis of the CB-VSFPWM effectiveness in reducing the negative effect of the dead-time has explained in this study and confirmed by the MATLAB/Simulink simulation results.


Author(s):  
Nhờ Văn NGUYỄN ◽  
HONG-PHONG NGUYEN LE

Multilevel voltage source inverters (VSIs) have been used for several decades thanks to their advantages compared with traditional two level VSI. Among various types of multilevel configuration, the T-type neutral-point-clamped VSI (3L TNPC VSI or 333-type VSI) has gained the attention in recent years. Due to the unique structure, the 333-type VSI has critical issues in reliability in operation such as switch-open-circuit (SOC) and switch-short-circuit (SSC), which lead to several unrequired issues, for instance, reduction of system performance, distorted and unbalanced output voltages and currents, or triggering the protection circuits. In some applications, the amplitude reduction and harmonics distortion of output voltages in SOC faults are not acceptable. Therefore, it is necessary to develop a pulse-width modulation (PWM) algorithm for 333-type VSI working under SOC fault which guarantees the desired output fundamental component voltage. The simultaneous SOC fault on two neutral-point-connected legs in the 333-type VSI may cause a large reduction in the output voltage. Under this circumstance, the 333-type VSI becomes an asymmetrical one called 322-type VSI. Certain studies regarding to the operation of 333-type VSI under SOC faults have been carried out. However, these studies require more semiconductor devices in order to create a redundant switching circuit. This leads to higher system cost with reduced inverter effieciency due to the additional loss. In this study, two carrier-based pulse-width modulation (CBPWM) techniques, i.e. 322-sinusoidal PWM (322-SPWM) and 322-medium offset CBPWM (322-MOCBPWM) are proposed for 322-type VSI. The proposed techniques are firstly simulated in MATLAB/Simulink and then implemented on a hardware setup. Performances of the proposed techniques are evaluated in terms of total harmonic distortion (THD) and weighted-THD (WTHD) of output voltages. Simulation results show that considering the worst output voltage under SOC fault, vBC, the proposed 322-SPWM technique could improve the THD by 40% and the WTHD by 94% compared with the uncompensated case with m=0.8. The corresponding results of 322-MOCBPWM technique are 42% and 96%, respectively. Characteristics of THD and WTHD values are also presented for demonstration the effectiveness of the proposed algorithm.


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