Fabrication of Miniature CMOS Image Sensor Using Novel Glass Cover Chip Packaging Technique

2009 ◽  
Vol 131 (4) ◽  
Author(s):  
Chuen-Ching Wang ◽  
Yao-Ting Ye ◽  
Jing-Fung Lin
Keyword(s):  
Heat Dissipation ◽  
Performance Indicator ◽  
Glass Plate ◽  
Adhesive Force ◽  
Image Sensor ◽  
Cover Plate ◽  
Adhesive Film ◽  
Glass Cover ◽  
Cmos Image Sensors ◽  
Packaging Technique

This study develops a novel glass cover chip (GCC) technique for the packaging of CMOS image sensors (CIS), in which the glass cover plate is attached directly to the chip using a nonconductive adhesive film. Taking the adhesive force between the glass plate and the chip as a performance indicator, a series of Taguchi trials are performed to establish the optimal GCC processing conditions. The experimental results confirm the feasibility of the proposed packaging technique and indicate a volume reduction of 59.47% compared with the traditional CIS package. Furthermore, the simulation results reveal that the heat dissipation efficiency of the proposed CIS package exceeds that of the traditional package by 245%.

scholarly journals 1/f Noise Modelling and Characterization for CMOS Quanta Image Sensors

Sensors ◽  
2019 ◽  
Vol 19 (24) ◽  
pp. 5459
Author(s):  
Wei Deng ◽  
Eric R. Fossum
Keyword(s):  
Analog Circuits ◽  
Image Sensor ◽  
Image Sensors ◽  
Correlated Double Sampling ◽  
Cmos Image Sensors ◽  
Source Follower ◽  
Cmos Analog Circuits ◽  
Different Origins ◽  
Noise Models ◽  
Fitting Model

This work fits the measured in-pixel source-follower noise in a CMOS Quanta Image Sensor (QIS) prototype chip using physics-based 1/f noise models, rather than the widely-used fitting model for analog designers. This paper discusses the different origins of 1/f noise in QIS devices and includes correlated double sampling (CDS). The modelling results based on the Hooge mobility fluctuation, which uses one adjustable parameter, match the experimental measurements, including the variation in noise from room temperature to –70 °C. This work provides useful information for the implementation of QIS in scientific applications and suggests that even lower read noise is attainable by further cooling and may be applicable to other CMOS analog circuits and CMOS image sensors.

Numerical Simulation of Electromagnetic Actuator for Impedance Pumping

2011 ◽  
Vol 483 ◽  
pp. 305-310 ◽  
Author(s):  
Chia Yen Lee ◽  
Chang Hsien Tai ◽  
Chin Lung Chang ◽  
Chien Hsiung Tsai ◽  
Yao Nan Wang ◽  
...  
Keyword(s):  
Numerical Simulation ◽  
Cover Plate ◽  
Electromagnetic Actuator ◽  
Valuable Contribution ◽  
Impedance Mismatch ◽  
Glass Cover ◽  
Impedance Pump ◽  
Ongoing Development ◽  
Study Designs ◽  
A Current

This study designs and analyzes an impedance pump utilizing an electromagnetic actuator. The pump is designed to have three major components, namely a lower glass substrate patterned with a copper micro-coil, a microchannel, and an upper glass cover plate attached a magnetic PDMS diaphragm. When a current is passed through the micro-coil, an electromagnetic force is established between the coil and the magnetic diaphragm. The resulting deflection of the PDMS diaphragm creates an acoustic impedance mismatch within the microchannel, which results in a net flow. Overall, the simulated results reveal that a net flow rate of 52.8 μl/min can be obtained using a diaphragm displacement of 31.5 μm induced by a micro-coil input current of 0.5 A. The impedance pump proposed in this study provides a valuable contribution to the ongoing development of Lab-on-Chips (LoCs) systems.

Total Ionizing Dose Effects on CMOS Image Sensors with Deep-Trench Isolation

2014 ◽  
Vol 605 ◽  
pp. 453-456
Author(s):  
Nayera Ahmed ◽  
Guo Neng Lu ◽  
François Roy
Keyword(s):  
Image Sensor ◽  
Parametric Modeling ◽  
Radiation Environment ◽  
Total Ionizing Dose ◽  
Deep Trench ◽  
Cmos Image Sensors ◽  
Trench Isolation ◽  
Before And After ◽  
Total Ionizing Dose Effects ◽  
Different Parts

We have investigated Total Ionizing Dose (TID) effects on a 1.4μm-pitch, Deep-Trench Isolation (DTI) CMOS image sensor for its use in radiation environment. Our investigation includes characterization and TCAD simulations (with parametric modeling) of the image sensor before and after irradiation with 60Co gamma rays source for TID from 3 to 100 Krad. We have obtained agreements between measured results and simulated ones on degradations of the characteristics Quantum Efficiency (QE) and dark current (Idark). The agreements validate our modeling and simulation approach to evaluating these characteristics. It has been shown that TID causes evolution of interface states of different parts of the pixel, which are responsible for QE and Idark degradations. TID effects on different parts of the pixel can be identified and quantified.

Joining of Sintered Alumina Substrates and LTCC Green Tapes via Cold Low Pressure Lamination

2013 ◽  
Vol 2013 (CICMT) ◽  
pp. 000268-000274
Author(s):  
Michael Hambuch ◽  
Frieder Gora ◽  
Karin Beart ◽  
Frieder Wittmann ◽  
Andreas Roosen
Keyword(s):  
Heat Conductivity ◽  
Heat Dissipation ◽  
Low Pressure ◽  
Adhesive Tape ◽  
Sintered Ceramic ◽  
Multilayer Systems ◽  
Ceramic Substrates ◽  
Adhesive Film ◽  
Lamination Process ◽  
Materials Used

In microelectronics there is a continuous trend for devices of higher integration and improved heat dissipation. For the manufacture of ceramic based microelectronic devices the following technologies can be applied. Thick-film hybrid technology uses sintered ceramic substrates, mostly Al2O3, which are screen printed with functional pastes, followed by firing at 850 °C. Alumina substrates provide very good heat conductivity (25 W/mK), but there are only two sides to carry a metallization. An improved miniaturization can be accomplished by multilayer systems using the LTCC technology. LTCC devices are manufactured by screen-printing, stacking and lamination of ceramic green tapes, followed by co-firing. A drawback of LTCCs is their low heat conductivity (3 W/mK) due to their high glass content. By combining hybrid and LTCC technology the advantages of both methods like good thermal conductivity and high multilayer integration, can be joined. Because the failure rate is too high to laminate green tapes on sintered ceramic substrates via thermo compression, Cold Low Pressure Lamination (CLPL) has been used as an alternative lamination process. CLPL is a lamination method, where the joining of the components is performed at room temperature by application of very low pressure (<5 MPa) by using a double sided adhesive tape. During heat treatment the adhesive film keeps the tapes together until the adhesive is completely decomposed; during further temperature increase the tapes are joined by sintering. The paper describes the materials used and processing steps to join the sintered material with the green tapes and discusses effects which occur during firing. These effects like edge curl and crack formation are mainly due to stresses which occur during constrained sintering. Their control can be influenced by changing process parameters.

scholarly journals Proximity Gettering Design of Hydrocarbon–Molecular–Ion–Implanted Silicon Wafers Using Dark Current Spectroscopy for CMOS Image Sensors

Sensors ◽  
2019 ◽  
Vol 19 (9) ◽  
pp. 2073 ◽  
Author(s):  
Kazunari Kurita ◽  
Takeshi Kadono ◽  
Satoshi Shigematsu ◽  
Ryo Hirose ◽  
Ryosuke Okuyama ◽  
...  
Keyword(s):  
Dark Current ◽  
Image Sensor ◽  
Image Sensors ◽  
Silicon Wafers ◽  
Device Fabrication ◽  
Oxide Semiconductor ◽  
Device Performance ◽  
Molecular Ion ◽  
Cmos Image Sensors ◽  
Ion Implanted

We developed silicon epitaxial wafers with high gettering capability by using hydrocarbon–molecular–ion implantation. These wafers also have the effect of hydrogen passivation on process-induced defects and a barrier to out-diffusion of oxygen of the Czochralski silicon (CZ) substrate bulk during Complementary metal-oxide-semiconductor (CMOS) device fabrication processes. We evaluated the electrical device performance of CMOS image sensor fabricated on this type of wafer by using dark current spectroscopy. We found fewer white spot defects compared with those of intrinsic gettering (IG) silicon wafers. We believe that these hydrocarbon–molecular–ion–implanted silicon epitaxial wafers will improve the device performance of CMOS image sensors.

scholarly journals Super Field-of-View Lensless Camera by Coded Image Sensors

Sensors ◽  
2019 ◽  
Vol 19 (6) ◽  
pp. 1329 ◽  
Author(s):  
Tomoya Nakamura ◽  
Keiichiro Kagawa ◽  
Shiho Torashima ◽  
Masahiro Yamaguchi
Keyword(s):  
Imaging System ◽  
Complementary Metal Oxide Semiconductor ◽  
Image Sensor ◽  
Image Sensors ◽  
Computational Imaging ◽  
Field Of View ◽  
Oxide Semiconductor ◽  
Back Side ◽  
Cmos Image Sensors ◽  
Rich Information

A lensless camera is an ultra-thin computational-imaging system. Existing lensless cameras are based on the axial arrangement of an image sensor and a coding mask, and therefore, the back side of the image sensor cannot be captured. In this paper, we propose a lensless camera with a novel design that can capture the front and back sides simultaneously. The proposed camera is composed of multiple coded image sensors, which are complementary-metal-oxide-semiconductor (CMOS) image sensors in which air holes are randomly made at some pixels by drilling processing. When the sensors are placed facing each other, the object-side sensor works as a coding mask and the other works as a sparsified image sensor. The captured image is a sparse coded image, which can be decoded computationally by using compressive sensing-based image reconstruction. We verified the feasibility of the proposed lensless camera by simulations and experiments. The proposed thin lensless camera realized super-field-of-view imaging without lenses or coding masks and therefore can be used for rich information sensing in confined spaces. This work also suggests a new direction in the design of CMOS image sensors in the era of computational imaging.

A 4-tap global shutter pixel with enhanced IR sensitivity for VGA time-of-flight CMOS image sensors

2020 ◽  
Vol 2020 (7) ◽  
pp. 103-1-103-6
Author(s):  
Taesub Jung ◽  
Yonghun Kwon ◽  
Sungyoung Seo ◽  
Min-Sun Keel ◽  
Changkeun Lee ◽  
...  
Keyword(s):  
Time Of Flight ◽  
Light Sensitivity ◽  
Image Sensor ◽  
Image Sensors ◽  
Double Sampling ◽  
Back Side ◽  
Long Distance ◽  
Correlated Double Sampling ◽  
Cmos Image Sensors ◽  
Side Illumination

An indirect time-of-flight (ToF) CMOS image sensor has been designed with 4-tap 7 μm global shutter pixel in back-side illumination process. 15000 e- of high full-well capacity (FWC) per a tap of 3.5 μm pitch and 3.6 e- of read-noise has been realized by employing true correlated double sampling (CDS) structure with storage gates (SGs). Noble characteristics such as 86 % of demodulation contrast (DC) at 100MHz operation, 37 % of higher quantum efficiency (QE) and lower parasitic light sensitivity (PLS) at 940 nm have been achieved. As a result, the proposed ToF sensor shows depth noise less than 0.3 % with 940 nm illuminator in even long distance.

scholarly journals Effect of Color Coating of Cover Plate on Thermal Behavior of Flat Plate Solar Collector

Energies ◽  
2020 ◽  
Vol 13 (24) ◽  
pp. 6696
Author(s):  
Chengyi Li ◽  
Qunwu Huang ◽  
Yiping Wang
Keyword(s):  
Thermal Behavior ◽  
Solar Collector ◽  
Solar Irradiation ◽  
Cover Plate ◽  
Brick Wall ◽  
Absorber Plate ◽  
Plate Temperature ◽  
Glass Cover ◽  
Color Coating ◽  
The One

An important trend of Building Integrated Solar Thermal (BIST) system is to improve the aesthetic aspect of the solar collector to meet the requirement of architectural style and energy collection. Painting on the glass cover in an appropriate method is a simple and practical way. In this study, a halftone coating was used to print a red brick wall pattern on the glass cover. A series of comparative experiments were carried out to test the effect of the coating on the thermal behavior of the solar collector. In heat collection processes, compared with the solar collector with blank cover plate, the one with coated cover plate has lower absorber plate temperature and higher cover plate temperature. The lower the solar irradiance, the smaller the effect of color coating on the solar collector. Compared with the uncoated surface, the coated surface is more sensitive to solar irradiation. In the same heat collection process, compared with the solar collector coated on the outer surface of the cover plate, the one coated on the inner surface has 0.8 °C higher heat absorber plate temperature and 5% lower top heat loss.

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