The Effects of Temperature Cyclic Loading on Lead-Free Solder Joints of Wafer Level Chip Scale Package by Taguchi Method

2008 ◽  
Vol 130 (1) ◽  
Author(s):  
Wen-Ren Jong ◽  
Hsin-Chun Tsai ◽  
Hsiu-Tao Chang ◽  
Shu-Hui Peng
Keyword(s):  
Low Temperature ◽  
Shear Strain ◽  
Solder Joints ◽  
Strain Range ◽  
Lead Free ◽  
Lead Free Solder ◽  
Wafer Level ◽  
Chip Scale Package ◽  
Free Solder ◽  
Plastic Creep

In this study, the effects of the temperature cyclic loading on three lead-free solder joints of 96.5Sn–3.5Ag, 95.5Sn–3.8Ag-0.7Cu, and 95.5Sn–3.9Ag-0.6Cu bumped wafer level chip scale package (WLCSP) on printed circuit board assemblies are investigated by Taguchi method. The orthogonal arrays of L16 is applied to examine the shear strain effects of solder joints under five temperature loading parameters of the temperature ramp rate, the high and low temperature dwells, and the dwell time of both high and low temperatures by means of three simulated analyses of creep, plastic, and plastic-creep behavior on the WLCSP assemblies. It is found that the temperature dwell is the most significant factor on the effects of shear strain range from these analyses. The effect of high temperature dwell on the shear strain range is larger than that of low temperature dwell in creep analysis, while the effect of high temperature dwell on the shear strain range is smaller than that of low temperature dwell in both plastic and plastic-creep analyses.

Creep Analysis of Wafer Level Chip Scale Package (WLCSP) With 96.5Sn-3.5Ag and 100In Lead-Free Solder Joints and Microvia Build-Up Printed Circuit Board

2000 ◽  
Author(s):  
John H. Lau ◽  
Stephen H. Pan ◽  
Chris Chang
Keyword(s):  
Shear Stress ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Lead Free ◽  
Lead Free Solder ◽  
Wafer Level ◽  
Shear Creep ◽  
Printed Circuit ◽  
Chip Scale Package ◽  
Free Solder

Abstract In this study, time-temperature-dependent nonlinear analyses of lead-free solder bumped wafer level chip scale package (WLCSP) on printed circuit board (PCB) assemblies subjected to thermal cycling conditions are presented. Two different lead-free solder alloys are considered, namely, 96.5wt%Sn-3.5wt%Ag and 100wt%In. The 62wt%Sn-36wt%Pb-2wt%Ag solder alloy is also considered to establish a baseline. All of these solder alloys are assumed to obey the Garofalo-Arrhenius steady-state creep constitutive law. The shear stress and shear creep strain hysteresis loops, shear stress history, and shear creep strain history at the corner solder joint are presented for a better understanding of the thermal-mechanical behaviors of lead-free solder bumped WLCSP on PCB assemblies. Also, the effects of microvia build-up PCB on the WLCSP solder joint reliability are investigated.

Reliability Modeling of Lead Free Solder Joints in Wafer-Level Chip Scale Packages

2007 ◽  
Author(s):  
Jie-Hua Zhao ◽  
Vikas Gupta ◽  
Alok Lohia ◽  
Darvin Edwards
Keyword(s):  
Solder Joints ◽  
Inelastic Strain ◽  
Constitutive Laws ◽  
Constitutive Law ◽  
Lead Free ◽  
Lead Free Solder ◽  
Wafer Level ◽  
Reliability Modeling ◽  
Correlation Parameters ◽  
Free Solder

Board level thermomechanical fatigue lifetimes of five different wafer-level chip scale packages (WCSP’s) with lead-free solder joints were studied by both experiment and finite element method modeling. The effect of three different constitutive laws of the lead-free solder, namely Anand viscoplasticity, power law break-down creep and time hardening creep are also investigated for each of the five packages. The fatigue correlation parameters based on the increment of volume-averaged inelastic strain energy density are deduced for each of the corresponding three constitutive laws. It is demonstrated that the relative error of the predicted lifetime for WCSP with lead-free solder joints can be within 10% compared to experiment. It is found that the fatigue correlation parameters depend strongly on the specific constitutive law. Another important finding is that the fatigue correlation parameters depend on the specific package family. It is also demonstrated that when fatigue correlation parameters calibrated for other package families are applied to WCSPs, the error in predicted lifetimes is consistently large.

A novel high speed impact testing method for evaluating the low temperature effects of eutectic and lead‐free solder joints

2012 ◽  
Vol 24 (1) ◽  
pp. 22-29 ◽  
Author(s):  
De‐Shin Liu ◽  
Chang‐Lin Hsu ◽  
Chia‐Yuan Kuo ◽  
Ya‐Ling Huang ◽  
Kwang‐Lung Lin ◽  
...  
Keyword(s):  
Low Temperature ◽  
Temperature Effects ◽  
High Speed ◽  
Solder Joints ◽  
Impact Testing ◽  
Lead Free ◽  
Lead Free Solder ◽  
High Speed Impact ◽  
Testing Method ◽  
Free Solder

Low Temperature Vibration Reliability of Lead-free Solder Joints

2020 ◽  
Author(s):  
Karsten Meier ◽  
Maximilian Ochmann ◽  
Karlheinz Bock ◽  
David Leslie ◽  
Abhijit Dasgupta
Keyword(s):  
Low Temperature ◽  
Solder Joints ◽  
Lead Free ◽  
Lead Free Solder ◽  
Vibration Reliability ◽  
Free Solder

Creep Analysis of Wafer Level Chip Scale Package (WLCSP) With 96.5Sn-3.5Ag and 100In Lead-Free Solder Joints and Microvia Build-Up Printed Circuit Board

2002 ◽  
Vol 124 (2) ◽  
pp. 69-76 ◽  
Author(s):  
John H. Lau ◽  
Stephen H. Pan ◽  
Chris Chang
Keyword(s):  
Shear Stress ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Lead Free ◽  
Lead Free Solder ◽  
Wafer Level ◽  
Shear Creep ◽  
Printed Circuit ◽  
Chip Scale Package ◽  
Free Solder

In this study, time-temperature-dependent nonlinear analyses of lead-free solder bumped wafer level chip scale package (WLCSP) on printed circuit board (PCB) assemblies subjected to thermal cycling conditions are presented. Two different lead-free solder alloys are considered, namely, 96.5wt percent Sn-3.5wt percent Ag and 100wt percent In. The 62wt percent Sn-36wt percent Pb-2wt percent Ag solder alloy is also considered to establish a baseline. All of these solder alloys are assumed to obey the Garofalo-Arrhenius steady-state creep constitutive law. The shear stress and shear creep strain hysteresis loops, shear stress history, and shear creep strain history at the corner solder joint are presented for a better understanding of the thermal-mechanical behaviors of lead-free solder bumped WLCSP on PCB assemblies. Also, the effects of microvia build-up PCB on the WLCSP Solder joint reliability are investigated.

Reliability Modeling of Lead-Free Solder Joints in Wafer-Level Chip Scale Packages

2010 ◽  
Vol 132 (1) ◽  
Author(s):  
Jie-Hua Zhao ◽  
Vikas Gupta ◽  
Alok Lohia ◽  
Darvin Edwards
Keyword(s):  
Solder Joints ◽  
Inelastic Strain ◽  
Constitutive Laws ◽  
Constitutive Law ◽  
Lead Free ◽  
Lead Free Solder ◽  
Wafer Level ◽  
Reliability Modeling ◽  
Correlation Parameters ◽  
Free Solder

Board-level thermomechanical fatigue lifetimes of five different wafer-level chip scale packages (WCSPs) with lead-free solder joints were studied by both experiment and finite element method modeling. The effect of three different constitutive laws of the lead-free solder, namely Anand viscoplasticity, power law break-down creep, and time-hardening creep are also investigated for each of the five packages. The fatigue correlation parameters based on the increment of volume-averaged inelastic strain energy density are deduced for each of the corresponding three constitutive laws. It is demonstrated that the relative error of the predicted lifetime for WCSP with lead-free solder joints can be within 10% compared with experiment. It is found that the fatigue correlation parameters depend strongly on the specific constitutive law. Another important finding is that the fatigue correlation parameters depend on the specific package family. It is also demonstrated that when fatigue correlation parameters calibrated for other package families are applied to WCSPs, the error in predicted lifetimes is consistently large.

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