An Empirical Crack Propagation Model and its Applications for Solder Joints

1996 ◽  
Vol 118 (2) ◽  
pp. 104-107 ◽  
Author(s):  
Jimmy M. Hu

This paper investigates a strain based crack propagation model, and discusses the application of fracture mechanics approach in the reliability validation of leadless solder joints. The model includes the creep effect at different temperatures and hold times, and correlates well the thermal cycling test of 90 Pb/10 Sn joints. By apply this model, an engineering method to develop the inspection criteria in accelerated reliability validation tests of leadless solder joints is proposed.

1990 ◽  
Vol 112 (2) ◽  
pp. 104-109 ◽  
Author(s):  
Boon Wong ◽  
D. E. Helling

A mechanistic model for eutectic Pb/Sn solder life predictions has been developed and applied to leadless surface mount solder joints. This model can quantitatively describe both crack initiation and crack propagation processes in the solder. There are four parts to this model: a crack initiation model, a crack propagation model [1], a microstructural coarsening model and an analysis of the deformation in the solder during thermal cycling. By merging these models together, it is possible to predict the time to crack initiation and the time to failure of these solder joints. Solder joint life predictions show good agreement with data obtained on thermally cycled surface mount leadless chip resistors.


2018 ◽  
Vol 15 (4) ◽  
pp. 148-162 ◽  
Author(s):  
John Lau ◽  
Ming Li ◽  
Yang Lei ◽  
Margie Li ◽  
Iris Xu ◽  
...  

Abstract In this study, the reliability (thermal cycling and shock) performances of a fan-out wafer-level system-in-package (SiP) or heterogeneous integration with one large chip (5 × 5 mm), three small chips (3 ×3 mm), and four capacitors (0402) embedded in an epoxy molding compound package (10 × 10 mm) with two redistribution layers (RDLs) are experimentally determined. Emphasis is placed on the estimation of the Weibull life distribution, characteristic life, and failure rate of the solder joint and RDL of this package. The fan-out wafer-level packaging is assembled on a printed circuit board (PCB) with more than 400 (Sn3wt%Ag0.5wt%Cu) solder joints. It is a six-layer PCB. The sample sizes for the thermal cycling test and shock test are, respectively, equal to 60 and 24. The failure location and modes of the thermal cycling test and shock test of the fan-out wafer-level SiP solder joints and RDLs are provided and discussed. 3-D nonlinear finite element models are also constructed and analyzed for the fan-out heterogeneous integration package during thermal cycling and shock conditions. The simulation results are correlated to the experimental results. Finally, recommendations on improving the fan-out wafer-level SiP solder joints and RDLs under thermal and shock conditions are provided.


1990 ◽  
Vol 203 ◽  
Author(s):  
Yi-Hsin Pao

ABSTRACTThe approach developed is based on the assumption that thermal fatigue crack propagation in solder joints is primarily controlled by C* and J integrals. The effect of microstructural coarsening on crack propagation is discussed. A fracture criterion, J≥Jc, is used to define the failure of the joints. A crack growth governing equation has been formulated and can be numerically integrated to obtain the crack growth history given stress history as an input. The approach was applied to model the experiment by Wong and Helling [15]. In their experiment, surface-mounted electronic devices using eutectic Pb/Sn solder were tested in thermal cycles of −20 to 100°C and −55 to 125°C. A unified constitutive equation was assumed for the eutectic Pb/Sn solder. An equation for solving the shear stress in the joint was formulated and is coupled with the crack growth equation. Both equations were solved simultaneously by the Runge-Kutta method for the stress-time and crack growth history. The results of the prediction are in a good agreement with the experimental data, which indicates that fracture mechanics may be applied to describe the failure process of solder joints under cyclic thermal loadings.


Author(s):  
Donghyun Kim ◽  
Andrew Mawer ◽  
Glenn Y. Masada ◽  
Tess J. Moon

Part II of this paper describes an experimental and analytical study of crack propagation in SnPb and SnAgCu solder joints in 357-PBGA packages exposed to 30-minute thermal cycles of 0 to 100°C. Experimental results show that cracks propagate faster at the package interface than at the board interface; secondary cracks from at the package interface, but grow much slower than the primary cracks; and crack growth rates in SnPb joints are about 50% larger than in SnAgCu joints. A crack propagation model, developed using the fracture mechanics approach, calculates the energy release rate at the crack tip. Using this rate and experimental crack length data, crack propagation rates were computed. Simulation results show the effects of solder type and aging conditions on crack propagation rates and the effects of the number of cracks in a joint on crack propagation life.


2018 ◽  
Vol 2018 (1) ◽  
pp. 000224-000232 ◽  
Author(s):  
John Lau ◽  
Ming Li ◽  
Yang Lei ◽  
Margie Li ◽  
Iris Xu ◽  
...  

Abstract In this study, the reliability (thermal-cycling and shock) performances of a fan-out wafer-level system-in-package (SiP) or heterogeneous integration with one large chip (5mm×5mm), three small chips (3mm×3mm), and 4 capacitors (0402) embedded in an epoxy molding compound (EMC) package (10mm×10mm) with two RDLs (redistribution layers) are experimentally determined. Emphasis is placed on the estimation of the Weibull life distribution, characteristic life, and failure rate of the solder joint and RDL of this package. The fan-out wafer-level packaging (FOWLP) is assembled on a printed circuit board (PCB) with more than 400 (Sn3wt%Ag0.5wt%Cu) solder joints. It is a 6-layer PCB. The sample sizes for the thermal-cycling test and shock test are, respectively, equal to 60 and 24. The failure location and modes of the thermal-cycling test and shock test of the fan-out wafer-level SiP solder joints and RDLs are provided and discussed. 3-D nonlinear finite element models are also constructed and analyzed for the fan-out heterogeneous integration package during thermal-cycling and shock conditions. The simulation results are correlated to the experimental results. Finally, recommendations on improving the fan-out wafer-level SiP solder joints and RDLs under thermal and shock conditions are provided.


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