A Board Level Study of an Array of Ball Grid Components—Aerodynamic and Thermal Measurements

2003 ◽  
Vol 125 (4) ◽  
pp. 480-489 ◽  
Author(s):  
Reena Cole ◽  
Mark Davies ◽  
Jeff Punch
Keyword(s):  
Printed Circuit Board ◽  
Influence Factors ◽  
Thermal Characteristics ◽  
Electronic System ◽  
Circuit Board ◽  
Junction Temperature ◽  
Design Rule ◽  
Flat Plates ◽  
Thermal Measurements ◽  
Board Level

Electronic package manufacturers publish thermal characteristics of components, which are measured using standard tests, measuring a thermal resistance value for a single component on a standard test printed circuit board (PCB). This limits the applicability of the characterization, as it does not show what aerodynamic or thermal interaction each package will have in a real system. This paper presents a new board-level electronics system test vehicle consisting of an array of ball grid components on three different effective thermal conductivity multi-layer PCB’s. Aerodynamic and thermal measurements are presented. It appears that PCB’s populated with low profile electronic packages behave like flat plates, leading to the proposition that component temperatures can be calculated using flat plate predictions. It is shown how both the airflow and the board conductivity can have a critical effect on the junction temperature, and a simple design rule is suggested, in terms of influence factors, to take account of these effects. These will lead to better estimates of electronic system reliability in the early part of the design cycle.

In-Situ Mechanical Sample Preparation of Selected Sites and Components on Large Modules and Boards

2016 ◽  
Author(s):  
Jim Colvin ◽  
Timothy Hazeldine ◽  
Heenal Patel
Keyword(s):  
Sample Preparation ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Tilt Table ◽  
Standard Requirement ◽  
Open Design ◽  
Bga Packages ◽  
Silicon Thickness ◽  
Board Level

Abstract The standard requirement for FA Engineers needing to remove components from a board, prior to decapsulation or sample preparation, is shown to be greatly reduced, by the methods discussed here. By using a mechanical selected area preparation system with an open-design it is possible to reach all required areas of a large printed circuit board (PCB) or module to prepare a single component ‘in situ’. This makes subsequent optical or electrical testing faster and often more convenient to accomplish. Electronic End-pointing and 3D curvature compensation methods can often be used in parallel with sample prep techniques to further improve the consistency and efficacy of the decapsulation and thinning uniformity and final remaining silicon thickness (RST). Board level prep eliminates the worry of rework removal of BGA packages and the subsequent risk of damage to the device. Since the entire board is mounted, the contamination is restricted to the die surface and can be kept from the underside ball connections unlike current liquid immersion methods of package thinning or delayering. Since the camera is in line with the abrasion interface, imaging is real time during the entire milling and thinning process. Recent advances in automated tilt-table design have meant that a specific component’s angular orientation can be optimized for sample preparation. Improved tilt table technology also allows for improved mounting capability for boards of many types and sizes. The paper describes methods for decapsulation, thinning and backside polishing of a part ‘in situ’ on the polishing machine and allows the system to operate as a probe station for monitoring electrical characteristics while thinning. Considerations for designing board-level workholders are described – for boards that that are populated with components on one or even both sides. Using the techniques described, the quality of sample preparation and control is on a par with the processing of single package-level devices.

scholarly journals Compact Modelling of Electrical, Optical and Thermal Properties of Multi-Colour Power LEDs Operating on a Common PCB

Energies ◽  
2021 ◽  
Vol 14 (5) ◽  
pp. 1286
Author(s):  
Krzysztof Górecki ◽  
Przemysław Ptak
Keyword(s):  
Integrated Circuits ◽  
Optical Model ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Junction Temperature ◽  
Optical Parameters ◽  
Spice Simulation ◽  
Light Emitting ◽  
Proposed Model ◽  
Good Agreement

This paper concerns the problem of modelling electrical, thermal and optical properties of multi-colour power light-emitting diodes (LEDs) situated on a common PCB (Printed Circuit Board). A new form of electro-thermo-optical model of such power LEDs is proposed in the form of a subcircuit for SPICE (Simulation Program with Integrated Circuits Emphasis). With the use of this model, the currents and voltages of the considered devices, their junction temperature and selected radiometric parameters can be calculated, taking into account self-heating phenomena in each LED and mutual thermal couplings between each pair of the considered devices. The form of the formulated model is described, and a manner of parameter estimation is also proposed. The correctness and usefulness of the proposed model are verified experimentally for six power LEDs emitting light of different colours and mounted on an experimental PCB prepared by the producer of the investigated devices. Verification was performed for the investigated diodes operating alone and together. Good agreement between the results of measurements and computations was obtained. It was also proved that the main thermal and optical parameters of the investigated LEDs depend on a dominant wavelength of the emitted light.

Experimental Investigation by Speckle Interferometry of Solder Joint Failure Under Thermomechanical Load Aggravated by Boundary Conditions at Board Level

2012 ◽  
Vol 134 (4) ◽  
Author(s):  
D. N. Borza ◽  
I. T. Nistea
Keyword(s):  
Solder Joint ◽  
Fundamental Frequency ◽  
Printed Circuit Board ◽  
Speckle Interferometry ◽  
Circuit Board ◽  
Joint Failure ◽  
Printed Circuit ◽  
Out Of Plane ◽  
Fringe Patterns ◽  
Board Level

Reliability of electronic assemblies at board level and solder joint integrity depend upon the stress applied to the assembly. The stress is often of thermomechanical or of vibrational nature. In both cases, the behavior of the assembly is strongly influenced by the mechanical boundary conditions created by the printed circuit board (PCB) to casing fasteners. In many previously published papers, the conditions imposed to the fasteners are mostly aiming at an increase of the fundamental frequency and a decrease of static or dynamic displacement values characterizing the deformation. These conditions aim at reducing the fatigue in different parts of these assemblies. In the photomechanics laboratory of INSA Rouen, the origins of solder joint failure have been investigated by means of full-field measurements of the flexure deformation induced by vibrations or by forced thermal convection. The measurements were done both at a global level for the whole printed circuit board assembly (PCBA) and at a local level at the solder joints where failure was reported. The experimental technique used was phase-stepped laser speckle interferometry. This technique has a submicrometer sensitivity with respect to out-of-plane deformations induced by bending and its use is completely nonintrusive. Some of the results were comforted by comparison with a numerical finite elements model. The experimental results are presented either as time-average holographic fringe patterns, as in the case of vibrations, or as wrapped phase patterns, as in the case of deformation under thermomechanical stress. Both types of fringe patterns may be processed so as to obtain the explicit out-of-plane static deformation (or vibration amplitude) maps. Experimental results show that the direct cause of solder joint failure may be a high local PCB curvature produced by a supplementary fastening screw intended to reduce displacements and increase fundamental frequency. The curvature is directly responsible for tensile stress appearing in the leads of a large quad flat pack (QFP) component and for shear in the corresponding solder joints. The general principle of increasing the fundamental frequency and decreasing the static or dynamic displacement values has to be checked against the consequences on the PCB curvature near large electronic devices having high stiffness.

Numerical Model to Simulate the Drop Test of Printed Circuit Board (PCB)

2011 ◽  
Vol 423 ◽  
pp. 26-30
Author(s):  
S. Assif ◽  
M. Agouzoul ◽  
A. El Hami ◽  
O. Bendaou ◽  
Y. Gbati
Keyword(s):  
Solder Joint ◽  
Printed Circuit Board ◽  
Drop Test ◽  
Dynamic Responses ◽  
Circuit Board ◽  
Joint Stress ◽  
Printed Circuit ◽  
Increasing Demand ◽  
Improved Model ◽  
Board Level

Increasing demand for smaller consumer electronic devices with multi-function capabilities has driven the packaging architectures trends for the finer-pitch interconnects, thus increasing chances of their failures. A simulation of the Board Level Drop-Test according to JEDEC (Joint Electron Device Council) is performed to evaluate the solder joint reliability under drop impact test. After good insights to the physics of the problem, the results of the numerical analysis on a simple Euler-Bernoulli beam were validated against analytical analysis. Since the simulation has to be performed on ANSYS Mechanical which is an implicit software, two methods were proposed, the acceleration-input and the displacement-input. The results are the same for both methods. Therefore, the simulation is carried on the real standard model construction of the board package level2. Then a new improved model is proposed to satisfy shape regular element and accuracy. All the models are validated to show excellent first level correlation on the dynamic responses of Printed Circuit Board, and second level correlation on solder joint stress. Then a static model useful for quick design analysis and optimization’s works is proposed and validated. Finally, plasticity behavior is introduced on the solder ball and a non-linear analysis is performed.

Numerical Investigation of Heat Transfer of Twelve Plastic Leaded Chip Carrier (PLCC) by Using Computational Fluid Dynamic, FLUENTTM Software

2013 ◽  
Vol 795 ◽  
pp. 603-610 ◽  
Author(s):  
Mohamed Mazlan ◽  
A. Rahim ◽  
M.A. Iqbal ◽  
Mohd Mustafa Al Bakri Abdullah ◽  
W. Razak ◽  
...  
Keyword(s):  
Printed Circuit Board ◽  
Fluid Dynamic ◽  
Three Dimensional ◽  
Circuit Board ◽  
Junction Temperature ◽  
Inlet Velocity ◽  
Chip Carrier ◽  
Flow Through ◽  
Package Density ◽  
Heat And Fluid Flow

Plastic Leaded Chip Carrier (PLCC) package has been emerged a promising option to tackle the thermal management issue of micro-electronic devices. In the present study, three dimensional numerical analysis of heat and fluid flow through PLCC packages oriented in-line and mounted horizontally on a printed circuit board, is carried out using a commercial CFD code, FLUENTTM. The simulation is performed for 12 PLCC under different inlet velocities and chip powers. The contours of average junction temperatures are obtained for each package under different conditions. It is observed that the junction temperature of the packages decreases with increase in inlet velocity and increases with chip power. Moreover, the increase in package density significantly contributed to rise in temperature of chips. Thus the present simulation demonstrates that the chip density (the number of packages mounted on a given area), chip power and the coolant inlet velocity are strongly interconnected; hence their appropriate choice would be crucial.

Review of Printed-Circuit-Board Level EMI/EMC Issues and Tools

2010 ◽  
Vol 52 (2) ◽  
pp. 455-461 ◽  
Author(s):  
Bruce Archambeault ◽  
Colin Brench ◽  
Sam Connor
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Printed Circuit ◽  
Board Level

Failure Analysis of Halogen-Free Printed Circuit Board Assembly Under Board-Level Drop Test

2012 ◽  
Vol 134 (1) ◽  
Author(s):  
Hung-Jen Chang ◽  
Chau-Jie Zhan ◽  
Tao-Chih Chang ◽  
Jung-Hua Chou
Keyword(s):  
Printed Circuit Board ◽  
Drop Test ◽  
Circuit Board ◽  
Printed Circuit Board Assembly ◽  
Printed Circuit ◽  
Plastic Ball ◽  
Circuit Board Assembly ◽  
Halogen Free ◽  
Board Level ◽  
The Impact

In this study, a lead-free dummy plastic ball grid array component with daisy-chains and Sn4.0Ag0.5Cu Pb-free solder balls was assembled on an halogen-free high density interconnection printed circuit board (PCB) by using Sn1.0Ag0.5Cu solder paste on the Cu pad surfaces of either organic solderable preservative (OSP) or electroless nickel immersion gold (ENIG). The assembly was tested for the effect of the formation extent of Ag3Sn intermetallic compound. Afterward a board-level pulse-controlled drop test was conducted on the as-reflowed assemblies according to the JESD22-B110 and JESD22-B111 standards, the impact performance of various surface finished halogen-free printed circuit board assembly was evaluated. The test results showed that most of the fractures occurred around the pad on the test board first. Then cracks propagated across the outer build-up layer. Finally, the inner copper trace was fractured due to the propagated cracks, resulting in the failure of the PCB side. Interfacial stresses numerically obtained by the transient stress responses supported the test observation as the simulated initial crack position was the same as that observed.

An Experimental Assessment of Numerical Predictive Accuracy for Electronic Component Heat Transfer in Forced Convection—Part II: Results and Discussion

2003 ◽  
Vol 125 (1) ◽  
pp. 76-83 ◽  
Author(s):  
Peter J. Rodgers ◽  
Vale´rie C. Eveloy ◽  
Mark R. Davies
Keyword(s):  
Heat Transfer ◽  
Forced Convection ◽  
Printed Circuit Board ◽  
Predictive Accuracy ◽  
Numerical Models ◽  
Circuit Board ◽  
Junction Temperature ◽  
Electrical Performance ◽  
Test Cases ◽  
Computational Fluid Dynamics Cfd

Numerical predictive accuracy is assessed for component-printed circuit board (PCB) heat transfer in forced convection using a widely used computational fluid dynamics (CFD) software. In Part I of this paper, the benchmark test cases, experimental methods and numerical models were described. Component junction temperature prediction accuracy for the populated board case is typically within ±5°C or ±10%, which would not be sufficient for temperature predictions to be used as boundary conditions for subsequent reliability and electrical performance analyses. Neither the laminar or turbulent flow model resolve the complete flow field, suggesting the need for a turbulence model capable of modeling transition. The full complexity of component thermal interaction is shown not to be fully captured.

High-Speed Cyclic Bend Tests and Board-Level Drop Tests for Evaluating the Robustness of Solder Joints in Printed Circuit Board Assemblies

2009 ◽  
Vol 38 (6) ◽  
pp. 884-895 ◽  
Author(s):  
E.H. Wong ◽  
S.K.W. Seah ◽  
C.S. Selvanayagam ◽  
R. Rajoo ◽  
W.D. van Driel ◽  
...  
Keyword(s):  
High Speed ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Circuit Board ◽  
Printed Circuit ◽  
Drop Tests ◽  
Bend Tests ◽  
Board Level
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