Using Graph Grammars to Develop Embedded Systems Based on UML Models

2011 ◽  
Author(s):  
Nicolas N. Bisi ◽  
Vinicius Pazzini ◽  
Luciana Foss ◽  
Simone Andre da Costa Cavalheiro ◽  
Lisane B. de Brisolara ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Graph Grammars ◽  
Uml Models

MADES: A Tool Chain for Automated Verification of UML Models of Embedded Systems

2012 ◽  
pp. 340-351 ◽  
Author(s):  
Alek Radjenovic ◽  
Nicholas Matragkas ◽  
Richard F. Paige ◽  
Matteo Rossi ◽  
Alfredo Motta ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Automated Verification ◽  
Tool Chain ◽  
Uml Models

VERIFICATION OF EMBEDDED SUPERVISORY CONTROLLERS CONSIDERING HYBRID PLANT DYNAMICS

2005 ◽  
Vol 15 (02) ◽  
pp. 307-312 ◽  
Author(s):  
SEBASTIAN ENGELL ◽  
SVEN LOHMANN ◽  
OLAF STURSBERG
Keyword(s):  
Model Checking ◽  
Embedded Systems ◽  
Timed Automata ◽  
Processing System ◽  
Hybrid Plant ◽  
Graph Grammars ◽  
Safety Properties ◽  
Hybrid Automaton ◽  
Plant Behavior ◽  
Hybrid Dynamics

This contribution proposes a link between the specification of supervisory controllers by Sequential Function Charts (SFC) and the verification of embedded systems with hybrid dynamics. The SFC are transformed into modular timed automata using a procedure based on graph grammars. The resulting controller model is composed with a hybrid automaton (with possibly nonlinear continuous dynamics) that models the plant behavior. In order to verify safety properties of the composed system algorithmically, a tool implementing the recently proposed approach of counterexample guided model checking is employed. The procedure is illustrated for a processing system example.

scholarly journals Generating VHDL Source Code from UML Models of Embedded Systems

2010 ◽  
pp. 125-136 ◽  
Author(s):  
Tomás G. Moreira ◽  
Marco A. Wehrmeister ◽  
Carlos E. Pereira ◽  
Jean-François Pétin ◽  
Eric Levrat
Keyword(s):  
Embedded Systems ◽  
Source Code ◽  
Uml Models
Sign in / Sign up

Export Citation Format

Share Document