Using verification technology for validation coverage analysis and test generation

2002 ◽  
Author(s):  
D. Moundanos ◽  
J.A. Abraham
Keyword(s):  
Test Generation ◽  
Coverage Analysis

Automatic Test Generation for Coverage Analysis Using CBMC

2009 ◽  
pp. 287-294 ◽  
Author(s):  
Damiano Angeletti ◽  
Enrico Giunchiglia ◽  
Massimo Narizzano ◽  
Alessandra Puddu ◽  
Salvatore Sabina
Keyword(s):  
Test Generation ◽  
Automatic Test Generation ◽  
Automatic Test ◽  
Coverage Analysis

Automatic Test Generation for Coverage Analysis of ERTMS Software

2009 ◽  
Author(s):  
Damiano Angeletti ◽  
Enrico Giunchiglia ◽  
Massimo Narizzano ◽  
Alessandra Puddu ◽  
Salvatore Sabina
Keyword(s):  
Test Generation ◽  
Automatic Test Generation ◽  
Automatic Test ◽  
Coverage Analysis

Directed Test Generation for Activation of Security Assertions in RTL Models

2021 ◽  
Vol 26 (4) ◽  
pp. 1-28
Author(s):  
Hasini Witharana ◽  
Yangdi Lyu ◽  
Prabhat Mishra
Keyword(s):  
Error Detection ◽  
Test Generation ◽  
Symbolic Execution ◽  
Monitor System ◽  
Security Vulnerabilities ◽  
Coverage Analysis ◽  
Vast Literature ◽  
Software And Hardware ◽  
On Chip ◽  
Hardware Designs

Assertions are widely used for functional validation as well as coverage analysis for both software and hardware designs. Assertions enable runtime error detection as well as faster localization of errors. While there is a vast literature on both software and hardware assertions for monitoring functional scenarios, there is limited effort in utilizing assertions to monitor System-on-Chip (SoC) security vulnerabilities. We have identified common SoC security vulnerabilities and defined several classes of assertions to enable runtime checking of security vulnerabilities. A major challenge in assertion-based validation is how to activate the security assertions to ensure that they are valid. While existing test generation using model checking is promising, it cannot generate directed tests for large designs due to state space explosion. We propose an automated and scalable mechanism to generate directed tests using a combination of symbolic execution and concrete simulation of RTL models. Experimental results on diverse benchmarks demonstrate that the directed tests are able to activate security assertions non-vacuously.

Abstraction techniques for validation coverage analysis and test generation

1998 ◽  
Vol 47 (1) ◽  
pp. 2-14 ◽  
Author(s):  
D. Moundanos ◽  
J.A. Abraham ◽  
Y.V. Hoskote
Keyword(s):  
Test Generation ◽  
Coverage Analysis

SP3-FAIMS Chemoproteomics for High Coverage Profiling of the Human Cysteinome

2020 ◽  
Author(s):  
Tianyang Yan ◽  
Heta Desai ◽  
Lisa Boatner ◽  
Stephanie Yen ◽  
Jian Cao ◽  
...  
Keyword(s):  
High Throughput ◽  
High Coverage ◽  
Method Integration ◽  
Coverage Analysis

<p>We report a new cysteine chemoproteomic method, termed SP3-FAIMS chemoproteomics, which enables rapid and high coverage analysis of the human cysteinome. By combining enhanced cysteine biotinylation with SP3 sample decontamination and FAIMS online fraction, we identified in aggregate 34,225 unique cysteines found on 7,243 proteins. Showcasing the versatility of our method, integration with the isoTOP-ABPP workflow enabled the high throughput discovery of cysteines labelled by electrophilic compounds. </p>

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