scholarly journals Minimum Cost Fault Tolerant Adder Circuits in Reversible Logic Synthesis

Author(s):  
Sajib Kumar Mitra ◽  
Ahsan Raja Chowdhury
2009 ◽  
Vol 20 (9) ◽  
pp. 2332-2343
Author(s):  
Zhi-Qiang LI ◽  
Wen-Qian LI ◽  
Han-Wu CHEN

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