Minimum Cost Fault Tolerant Adder Circuits in Reversible Logic Synthesis
Keyword(s):
2013 ◽
Vol 44
(6)
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pp. 519-537
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Keyword(s):
2014 ◽
Vol 108
(2)
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pp. 7-12
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Keyword(s):
2015 ◽
Vol 129
(11)
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pp. 29-32
2014 ◽
pp. 95-110
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