A technique to truncate IIR filter impulse response and its application to real-time implementation of linear-phase IIR filters

2003 ◽  
Vol 51 (5) ◽  
pp. 1284-1292 ◽  
Author(s):  
A. Kurosu ◽  
S. Miyase ◽  
S. Tomiyama ◽  
T. Takebe
Keyword(s):  
Real Time ◽  
Impulse Response ◽  
Linear Phase ◽  
Iir Filters ◽  
Iir Filter

scholarly journals Design of One-Dimensional Linear Phase Digital IIR Filters Using Orthogonal Polynomials

2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
Vinay Kumar ◽  
Sunil Bhooshan
Keyword(s):  
Orthogonal Polynomials ◽  
Impulse Response ◽  
Phase 1 ◽  
Infinite Impulse Response ◽  
Linear Phase ◽  
One Dimensional ◽  
Iir Filters ◽  
Iir Filter ◽  
Amplitude Characteristics ◽  
Zeros And Poles

In the present paper, we discuss a method to design a linear phase 1-dimensional Infinite Impulse Response (IIR) filter using orthogonal polynomials. The filter is designed using a set of object functions. These object functions are realized using a set of orthogonal polynomials. The method includes placement of zeros and poles in such a way that the amplitude characteristics are not changed while we change the phase characteristics of the resulting IIR filter.

scholarly journals Efficient uniform digital filter bank with linear phase and FRM technique for hearing aids

2018 ◽  
Vol 7 (1.9) ◽  
pp. 69 ◽  
Author(s):  
G Parameshappa ◽  
D Jayadevapp
Keyword(s):  
Digital Filter ◽  
Hearing Aids ◽  
Filter Bank ◽  
Fir Filter ◽  
Linear Phase ◽  
Iir Filters ◽  
Iir Filter ◽  
Band Filter ◽  
Frequency Response Masking ◽  
Digital Filter Bank

This paper attempts to present an uniform digital filter bank based on linear phase FIR and IIR filters applied for Frequency Response Masking (FRM) technique in hearing aid applications.In the proposed filter bank, nine uniformly spaced sub-bands are formed with the help of half band filters and masking filters. These nine channel FIR filter bank is realized using an interpolated half band linear phase FIR filter and an appropriate number of masking FIR filters. The nine channel IIR filter bank is realized using an interpolated half band approximately linear phase IIR filter and an appropriate number of masking filters. The proposed approximately linear phase IIR half band filter bank is compared with filter bank based on linear phase FIR half band filters in terms of area, power, memory and number of gates needed for implementation. The experiment was carried on various hearing loss cases and the results obtained from these tests proves that, the proposed filter bank achieved the required matching between audiograms and magnitude response of the filter bank at very reasonable range with less computational complexity.

Design of a nearly linear-phase IIR filter and JPEG compression ECG signal in real-time system

2021 ◽  
Vol 67 ◽  
pp. 102431
Author(s):  
Ngoc Thang Bui ◽  
Thi My Tien Nguyen ◽  
Sumin Park ◽  
Jaeyeop Choi ◽  
Thi Mai Thien Vo ◽  
...  
Keyword(s):  
Real Time ◽  
Jpeg Compression ◽  
Ecg Signal ◽  
Linear Phase ◽  
Time System ◽  
Real Time System ◽  
Iir Filter

scholarly journals Implementation of Parallel and Pipeline Scheme in the Standard Floating Point Adder to Improve the Speed

2019 ◽  
Vol 9 (2) ◽  
pp. 3073-3076
Keyword(s):  
Signal Processing ◽  
Real Time ◽  
Impulse Response ◽  
Floating Point ◽  
Infinite Impulse Response ◽  
Time Signal ◽  
Fir Filters ◽  
Iir Filters ◽  
In Series ◽  
Floating Point Numbers

In real time Signal Processing applications, the analogue signal is over sampled as per the Nyquist criterion in order to avoid the aliasing effect. Floating Point (FP) adder is used in the floating point Multiplier Accumulator Content (MAC) for real time Digital Signal Processing(DSP) applications. The heart of any real time DSP processor is floating point MAC. Floating Point MAC is constructed by Finite Impulse Response (FIR) or Infinite Impulse Response (IIR) filters. FIR filters are stable than IIR filters because the impulse response is finite in FIR. Hence, for stable applications FIR filters are preferred. These FIR filters are intern constituted by FP adder, FP multiplier and shifter. In conventional floating point adder the two floating point numbers are added in series. Series means one after the other so the computation speed is less. In series fashion adding the floating point numbers means definitely it furnishes more delay[1] because in the addition of floating point numbers, along with the addition of mantissas; computation is required for both signs and exponents also. Hence, the processing speed is slow for computing the floating point numbers compared with fixed point numbers. Therefore, in order to increase the speed of operation for floating point addition in real time application i.e., to add 16- samples at a time which are in floating notation; a parallel and pipe line technique is going to be incorporated to the two bit floating point architecture. Before developing such novel architecture, a novel algorithm is developed and after, the novel architecture is developed. The total work is simulated by Modelsim 10.3c tool and synthesized by Xilinx 13.6 tool.

scholarly journals A Phasor Measurement Unit Algorithm Using IIR Filters for FPGA Implementation

Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1523
Author(s):  
Cornelis Jan Kikkert
Keyword(s):  
Impulse Response ◽  
Finite Impulse Response ◽  
Block Diagram ◽  
Rate Of Change ◽  
Measurement Unit ◽  
Infinite Impulse Response ◽  
Iir Filters ◽  
Iir Filter ◽  
Phasor Measurement ◽  
Ieee Standard

Phasor measurement units (PMU) are increasingly used in electrical power transmission networks, to maintain stability and protect the network. PMUs accurately measure voltage, phase, frequency, and rate of change of frequency (ROCOF). For reliability, it is desirable to implement a PMU using an FPGA. This paper describes a novel algorithm, suited to implementation in an FPGA and based on a simple PMU block diagram. A description of its realization using low hardware complexity infinite impulse response (IIR) filters is given. The IEC/IEEE standard 60255-118-1:2018 Part 118-1: Synchrophasor measurements for power systems, describes “reference” Finite Impulse Response (FIR) filters for implementing PMU hardware. At the 10 kHz sampling frequency used for our implementation, each “reference” FIR filter requires 100 multipliers, while an 8th order IIR filter only requires 12 multipliers. This paper compares the performance of different order IIR filter-based PMUs with the performance of the same PMU algorithm using the IEC/IEEE FIR reference filter. The IIR-based PMU easily satisfies all the requirements of IEC/IEEE standard and has a much better out of band signal rejection performance than a FIR-based PMU. Steady state errors for a rated voltage ± 10% and a rated frequency ± 5 Hz are < 0.000001% for total vector error (TVE) and < 1 µHz for frequency, with a latency of two mains cycles.

A Procedure for Quasi-Equiripple Linear-Phase IIR Filters Design

2010 ◽  
Vol 56 (4) ◽  
pp. 393-398 ◽  
Author(s):  
Jacek Konopacki ◽  
Katarzyna Mościńska
Keyword(s):  
Arbitrary Number ◽  
Group Delay ◽  
Filter Design ◽  
Linear Phase ◽  
Iir Filters ◽  
Iir Filter ◽  
Filter Order ◽  
Number Of Zeros

A Procedure for Quasi-Equiripple Linear-Phase IIR Filters DesignThe linear-phase IIR filters are described in many cases, mainly due to distortion-free transmission of signals. One of the major problems of IIR filter design is stability, which can be obtained with suitable value of group delay τ. This paper concerns calculation of filter orderNand group delay τ in case of quasi-equiripple design of IIR filters. We propose a novel procedure for determiningNand τ values; the procedure is valid for all types of filters with arbitrary number of zeros and a few non-zero poles. Evaluation of the proposed approach as well as examples illustrating its application are provided in the paper.

Design of linear-phase IIR filters via impulse-response gramians

1992 ◽  
Vol 40 (2) ◽  
pp. 389-394 ◽  
Author(s):  
V. Sreeram ◽  
P. Agathoklis
Keyword(s):  
Impulse Response ◽  
Linear Phase ◽  
Iir Filters

Low computation digital down converter using polyphase IIR filter

Circuit World ◽  
2019 ◽  
Vol 45 (3) ◽  
pp. 169-178 ◽  
Author(s):  
Hiren K. Mewada ◽  
Jitendra Chaudhari
Keyword(s):  
Group Delay ◽  
Filter Design ◽  
Fir Filter ◽  
Linear Phase ◽  
Content Type ◽  
Iir Filters ◽  
Iir Filter ◽  
Alternative Option ◽  
Digital Down Converter ◽  
Sample Rate

Purpose The digital down converter (DDC) is a principal component in modern communication systems. The DDC process traditionally entails quadrature down conversion, bandwidth reducing filters and commensurate sample rate reduction. To avoid group delay, distortion linear phase FIR filters are used in the DDC. The filter performance specifications related to deep stopband attenuation, small in-band ripple and narrow transition bandwidth lead to filters with a large number of coefficients. To reduce the computational workload of the filtering process, filtering is often performed as a two-stage process, the first stage being a down sampling Hoegenauer (or cascade-integrated comb) filter and a reduced sample rate FIR filter. An alternative option is an M-Path polyphase partition of a band cantered FIR filter. Even though IIR filters offer reduced workload to implement a specific filtering task, the authors avoid using them because of their poor group delay characteristics. This paper aims to propose the design of M-path, approximately linear phase IIR filters as an alternative option to the M-path FIR filter. Design/methodology/approach Two filter designs are presented in the paper. The first approach uses linear phase IIR low pass structure to reduce the filter’s coefficient. Whereas the second approach uses multipath polyphase structure to design approximately linear phase IIR filter in DDC. Findings The authors have compared the performance and workload of the proposed polyphase structured IIR filters with state-of-the-art filter design used in DDC. The proposed design is seen to satisfy tight design specification with a significant reduction in arithmetic operations and required power consumption. Originality/value The proposed design is an alternate solution to the M-path polyphase FIR filter offering very less number of coefficients in the filter design. Proposed DDC using polyphase structured IIR filter satisfies the requirement of linear phase with the least number of computation cost in comparison with other DDC structure.

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