High Performance FPGA Implementation of Elliptic Curve Cryptography over Binary Fields

2014 ◽  
Author(s):  
Shuai Liu ◽  
Lei Ju ◽  
Xiaojun Cai ◽  
Zhiping Jia ◽  
Zhiyong Zhang
Keyword(s):  
Elliptic Curve ◽  
Elliptic Curve Cryptography ◽  
High Performance ◽  
Fpga Implementation ◽  
Binary Fields

Implementation of Pollard Rho attack on elliptic curve cryptography over binary fields

2015 ◽  
Author(s):  
Wienardo ◽  
Fajar Yuliawan ◽  
Intan Muchtadi-Alamsyah ◽  
Budi Rahardjo
Keyword(s):  
Elliptic Curve ◽  
Elliptic Curve Cryptography ◽  
Binary Fields

scholarly journals A High-Speed Elliptic Curve Cryptography Processor for Teleoperated Systems Security

2021 ◽  
Vol 2021 ◽  
pp. 1-8
Author(s):  
Yong Xiao ◽  
Weibin Lin ◽  
Yun Zhao ◽  
Chao Cui ◽  
Ziwen Cai
Keyword(s):  
Elliptic Curve ◽  
Elliptic Curve Cryptography ◽  
High Speed ◽  
High Performance ◽  
Prime Field ◽  
Practical Applications ◽  
Cell Library ◽  
Cryptographic Algorithm ◽  
Human Operators ◽  
Key Length

Teleoperated robotic systems are those in which human operators control remote robots through a communication network. The deployment and integration of teleoperated robot’s systems in the medical operation have been hampered by many issues, such as safety concerns. Elliptic curve cryptography (ECC), an asymmetric cryptographic algorithm, is widely applied to practical applications because its far significantly reduced key length has the same level of security as RSA. The efficiency of ECC on GF (p) is dictated by two critical factors, namely, modular multiplication (MM) and point multiplication (PM) scheduling. In this paper, the high-performance ECC architecture of SM2 is presented. MM is composed of multiplication and modular reduction (MR) in the prime field. A two-stage modular reduction (TSMR) algorithm in the SCA-256 prime field is introduced to achieve low latency, which avoids more iterative subtraction operations than traditional algorithms. To cut down the run time, a schedule is put forward when exploiting the parallelism of multiplication and MR inside PM. Synthesized with a 0.13 um CMOS standard cell library, the proposed processor consumes 341.98k gate areas, and each PM takes 0.092 ms.

High-performance Implementation of Elliptic Curve Cryptography Using Vector Instructions

2019 ◽  
Vol 45 (3) ◽  
pp. 1-35 ◽  
Author(s):  
Armando Faz-Hernández ◽  
Julio López ◽  
Ricardo Dahab
Keyword(s):  
Elliptic Curve ◽  
Elliptic Curve Cryptography ◽  
High Performance
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