A Low Cost Implementation of Sample Entropy in Wearable Embedded Systems: An Example of Online Analysis for Sleep EEG

2021 ◽  
pp. 1-1
Author(s):  
Yung-Hung Wang ◽  
I-Yu Chen ◽  
Herming Chiueh ◽  
Sheng-Fu Liang
Keyword(s):  
Embedded Systems ◽  
Low Cost ◽  
Sample Entropy ◽  
Sleep Eeg ◽  
Online Analysis

Bringing Security to The Smallest Embedded Systems

2017 ◽  
Author(s):  
JOSEPH YIU
Keyword(s):  
Internet Of Things ◽  
Embedded Systems ◽  
Low Cost ◽  
Security Requirements ◽  
The Internet ◽  
Security Measures ◽  
Significant Challenge ◽  
Iot Devices

The increasing need for security in microcontrollers Security has long been a significant challenge in microcontroller applications(MCUs). Traditionally, many microcontroller systems did not have strong security measures against remote attacks as most of them are not connected to the Internet, and many microcontrollers are deemed to be cheap and simple. With the growth of IoT (Internet of Things), security in low cost microcontrollers moved toward the spotlight and the security requirements of these IoT devices are now just as critical as high-end systems due to:

Security Enhancement of Remote FPGA Devices By a Low Cost Embedded Network Processor

2013 ◽  
Vol 9 (2) ◽  
pp. 36-48
Author(s):  
Qutaiba Ali ◽  
Sahar Lazim
Keyword(s):  
Embedded Systems ◽  
Data Security ◽  
Low Cost ◽  
Network Processor ◽  
New Method ◽  
Design Data ◽  
Security Enhancement ◽  
Embedded Network

The incredible growth of FPGA capabilities in recent years and the new included features have made them more and more attractive for numerous embedded systems. There is however an important shortcoming concerning security of data and design. Data security implies the protection of the FPGA application in the sense that the data inside the circuit and the data transferred to/from the peripheral circuits during the communication are protected. This paper suggests a new method to support the security of any FPGA platform using network processor technology. Low cost IP2022 UBICOM network processor was used as a security shield in front of any FPGA device. It was supplied with the necessary security methods such as AES ciphering engine, SHA-1, HMAC and an embedded firewall to provide confidentiality, integrity, authenticity, and packets filtering features.

Modal Analysis of Structures with Low-cost Embedded Systems

2018 ◽  
Author(s):  
Alberto Girolami ◽  
Federica Zonzini ◽  
Luca De Marchi ◽  
Davide Brunelli ◽  
Luca Benini
Keyword(s):  
Embedded Systems ◽  
Modal Analysis ◽  
Low Cost

Development of Low-Cost Solar Tracking Embedded Systems for Sun Light Systems

2016 ◽  
Vol 14 (1) ◽  
pp. 19 ◽  
Author(s):  
Hyoung-Woo Kim ◽  
Byung-Han Sheen ◽  
Haeng-Sub Wi ◽  
Joon-Young Choi
Keyword(s):  
Embedded Systems ◽  
Low Cost ◽  
Solar Tracking ◽  
Sun Light

SIMULINK-BASED HW/SW CODESIGN OF EMBEDDED NEURO-FUZZY SYSTEMS

2000 ◽  
Vol 10 (03) ◽  
pp. 211-226 ◽  
Author(s):  
L. M. Reyneri ◽  
M. Chiaberge ◽  
L. Lavagno ◽  
B. Pino ◽  
E. Miranda
Keyword(s):  
Embedded Systems ◽  
Fuzzy Systems ◽  
High Speed ◽  
Low Cost ◽  
Performance Criteria ◽  
Functional Specification ◽  
Trade Offs ◽  
Neuro Fuzzy ◽  
Analysis Of Performance ◽  
Speed Simulation

We propose a semi-automatic HW/SW codesign flow for low-power and low-cost Neuro-Fuzzy embedded systems. Applications range from fast prototyping of embedded systems to high-speed simulation of Simulink models and rapid design of Neuro-Fuzzy devices. The proposed codesign flow works with different technologies and architectures (namely, software, digital and analog). We have used The Mathworks' Simulink© environment for functional specification and for analysis of performance criteria such as timing (latency and throughput), power dissipation, size and cost. The proposed flow can exploit trade-offs between SW and HW as well as between digital and analog implementations, and it can generate, respectively, the C, VHDL and SKILL codes of the selected architectures.

scholarly journals Fast DCT algorithms for EEG data compression in embedded systems

2015 ◽  
Vol 12 (1) ◽  
pp. 49-62 ◽  
Author(s):  
Darius Birvinskas ◽  
Vacius Jusas ◽  
Ignas Martisius ◽  
Robertas Damasevicius
Keyword(s):  
Embedded Systems ◽  
Data Compression ◽  
High Speed ◽  
Communication Channel ◽  
Brain Computer Interface ◽  
Low Cost ◽  
Computer Interface ◽  
Eeg Signals ◽  
Eeg Data ◽  
Transform Coefficients

Electroencephalography (EEG) is widely used in clinical diagnosis, monitoring and Brain - Computer Interface systems. Usually EEG signals are recorded with several electrodes and transmitted through a communication channel for further processing. In order to decrease communication bandwidth and transmission time in portable or low cost devices, data compression is required. In this paper we consider the use of fast Discrete Cosine Transform (DCT) algorithms for lossy EEG data compression. Using this approach, the signal is partitioned into a set of 8 samples and each set is DCT-transformed. The least-significant transform coefficients are removed before transmission and are filled with zeros before an inverse transform. We conclude that this method can be used in real-time embedded systems, where low computational complexity and high speed is required.

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