Static Random Access Memory Characteristics of Single-Gated Feedback Field-Effect Transistors

2019 ◽  
Vol 66 (1) ◽  
pp. 413-419 ◽  
Author(s):  
Jinsun Cho ◽  
Doohyeok Lim ◽  
Sola Woo ◽  
Kyungah Cho ◽  
Sangsig Kim
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Random Access ◽  
Random Access Memory ◽  
Static Random Access Memory ◽  
Access Memory ◽  
Memory Characteristics

scholarly journals One-transistor static random-access memory cell array comprising single-gated feedback field-effect transistors

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Sangik Choi ◽  
Jaemin Son ◽  
Kyoungah Cho ◽  
Sangsig Kim
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Random Access ◽  
Memory Cell ◽  
Random Access Memory ◽  
Static Random Access Memory ◽  
Cell Array ◽  
Access Memory ◽  
Sram Cell ◽  
The Individual

AbstractIn this study, we fabricated a 2 × 2 one-transistor static random-access memory (1T-SRAM) cell array comprising single-gated feedback field-effect transistors and examined their operation and memory characteristics. The individual 1T-SRAM cell had a retention time of over 900 s, nondestructive reading characteristics of 10,000 s, and an endurance of 108 cycles. The standby power of the individual 1T-SRAM cell was estimated to be 0.7 pW for holding the “0” state and 6 nW for holding the “1” state. For a selected cell in the 2 × 2 1T-SRAM cell array, nondestructive reading of the memory was conducted without any disturbance in the half-selected cells. This immunity to disturbances validated the reliability of the 1T-SRAM cell array.

A 0.5-V Six-Transistor Static Random Access Memory with Ferroelectric-Gate Field Effect Transistors

2010 ◽  
Vol 49 (12) ◽  
pp. 121501 ◽  
Author(s):  
Shuhei Tanakamaru ◽  
Teruyoshi Hatanaka ◽  
Ryoji Yajima ◽  
Kousuke Miyaji ◽  
Mitsue Takahashi ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Random Access ◽  
Random Access Memory ◽  
Static Random Access Memory ◽  
Access Memory

A Novel Peripheral Circuit for SWSFET Based Multivalued Static Random-Access Memory

2020 ◽  
Vol 29 (01n04) ◽  
pp. 2040010
Author(s):  
R. H. Gudlavalleti ◽  
B. Saman ◽  
R. Mays ◽  
Evan Heller ◽  
J. Chandy ◽  
...  
Keyword(s):  
Quantum Dot ◽  
Quantum Well ◽  
Field Effect Transistors ◽  
Random Access ◽  
Memory Cell ◽  
Random Access Memory ◽  
Static Random Access Memory ◽  
Access Memory ◽  
Input Gate ◽  
Reduction In Area

This paper presents the peripheral circuitry for a multivalued static random-access memory (SRAM) based on 2-bit CMOS cross-coupled inverters using spatial wavefunction switched (SWS) field effect transistors (SWSFETs). The novel feature is a two quantum well/quantum dot channel n-SWSFET access transistor. The reduction in area with four-bit storage-per-cell increases the memory density and efficiency of the SRAM array. The SWSFET has vertically stacked two-quantum well/quantum dot channels between the source and drain regions. The upper or lower quantum charge locations in the channel region is based on the input gate voltage. The analog behavioral modeling (ABM) of the SWSFET device is done using conventional BSIM 3V3 device parameters in 90 nm technology. The Cadence circuit simulations for the proposed memory cell and addressing/peripheral circuitry are presented.

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