Subthreshold Analog/RF Performance Enhancement of Underlap DG FETs With High- $k$ Spacer for Low Power Applications

2013 ◽  
Vol 60 (1) ◽  
pp. 63-69 ◽  
Author(s):  
Kalyan Koley ◽  
Arka Dutta ◽  
Binit Syamal ◽  
Samar K. Saha ◽  
Chandan Kumar Sarkar
Keyword(s):  
Low Power ◽  
Performance Enhancement ◽  
High K ◽  
Rf Performance

32nm gate-first high-k/metal-gate technology for high performance low power applications

2008 ◽  
Author(s):  
C. H. Diaz ◽  
K. Goto ◽  
H.T. Huang ◽  
Yuri Yasuda ◽  
C.P. Tsao ◽  
...  
Keyword(s):  
Low Power ◽  
High Performance ◽  
Metal Gate ◽  
High K

Development of high k/III-V (InGaAs, InAs, InSb) structures for future low power, high speed device applications

2013 ◽  
Vol 1538 ◽  
pp. 291-302
Author(s):  
Edward Yi Chang ◽  
Hai-Dang Trinh ◽  
Yueh-Chin Lin ◽  
Hiroshi Iwai ◽  
Yen-Ku Lin
Keyword(s):  
Low Power ◽  
Leakage Current ◽  
High Speed ◽  
High Performance ◽  
Gate Oxide ◽  
Chemical Cleaning ◽  
Low Leakage ◽  
Low Leakage Current ◽  
High K ◽  
Cleaning Methods

ABSTRACTIII-V compounds such as InGaAs, InAs, InSb have great potential for future low power high speed devices (such as MOSFETs, QWFETs, TFETs and NWFETs) application due to their high carrier mobility and drift velocity. The development of good quality high k gate oxide as well as high k/III-V interfaces is prerequisite to realize high performance working devices. Besides, the downscaling of the gate oxide into sub-nanometer while maintaining appropriate low gate leakage current is also needed. The lack of high quality III-V native oxides has obstructed the development of implementing III-V based devices on Si template. In this presentation, we will discuss our efforts to improve high k/III-V interfaces as well as high k oxide quality by using chemical cleaning methods including chemical solutions, precursors and high temperature gas treatments. The electrical properties of high k/InSb, InGaAs, InSb structures and their dependence on the thermal processes are also discussed. Finally, we will present the downscaling of the gate oxide into sub-nanometer scale while maintaining low leakage current and a good high k/III-V interface quality.

Network Performance Enhancement of Multi-sink Enabled Low Power Lossy Networks in SDN Based Internet of Things

2018 ◽  
Vol 48 (2) ◽  
pp. 367-398 ◽  
Author(s):  
Ghulam Shabbir ◽  
Adeel Akram ◽  
Muhammad Munwar Iqbal ◽  
Sohail Jabbar ◽  
Mai Alfawair ◽  
...  
Keyword(s):  
Internet Of Things ◽  
Low Power ◽  
Network Performance ◽  
Performance Enhancement ◽  
Lossy Networks
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