Low power and less complex implementation of fast block LMS adaptive filter using distributed arithmetic

2011 ◽  
Author(s):  
S Baghel ◽  
R Shaik
Keyword(s):  
Low Power ◽  
Adaptive Filter ◽  
Distributed Arithmetic

scholarly journals Low Power High Throughput Memory Less Adaptive Filter using Distributed Arithmetic

2019 ◽  
Vol 8 (10) ◽  
pp. 3381-3384
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Throughput ◽  
Adaptive Filter ◽  
Inner Product ◽  
Filter Coefficient ◽  
Distributed Arithmetic ◽  
Area Efficient

This paper briefs an area efficient, low power and high throughput LMS adaptive filter using Distributed Arithmetic architecture. The throughput is increased because of parallel updating of filter coefficient and computing the inner product simultaneously. Here we have proposed memory-less design of distributed arithmetic (MLDA) unit. The proposed design uses 2:1 multiplexer’s architecture to replace LUT of the conventional DA to reduce the overall area of the filter. Enhanced compressor adder is used for accumulation of the partial products, which further helps to reduce the area. Parallel updating of the generation and accumulation enhance the throughput of the design. The proposed architecture requires more than half area that required for the existing LUT based inner product block. The proposed design is implemented in synopsis design compiler and the result shows that the area decreased by 52.7% and also the MUX based DA for the Adaptive filter causes 69.25% less power consumption for filter tap N=16, 32 and 64. Proposed design provides 36.50% less Area Delay Product (ADP).

Energy Efficient VLSI Based DCT Architecture with Accurate Error Compensation

2014 ◽  
Vol 626 ◽  
pp. 127-135 ◽  
Author(s):  
D. Jessintha ◽  
M. Kannan ◽  
P.L. Srinivasan
Keyword(s):  
Low Power ◽  
Energy Efficient ◽  
Time Complexity ◽  
High Performance ◽  
Low Power Consumption ◽  
Distributed Arithmetic ◽  
Technology Scaling ◽  
Truncation Errors ◽  
History Of ◽  
Technology Dependency

Discrete Cosine Transform (DCT) is commonly used in image compression. In the history of DCT, a milestone was the Distributed Arithmetic (DA) technique. Due to the technology dependency a multiplier-less computation was built with DA based technique. It occupied less area but the throughput is less. Later, due to the technology scaling, multiplier based architectures can be easily adapted for low-power and high-performance architecture. Fixed width multipliers [1]-[7] reduces hardware and time complexity. In this work, Radix 4 fixed width multiplier is adapted with DCT architecture due to low power consumption and saves 30% power. In order to reduce truncation errors caused during fixed width multiplication, an estimation circuit is designed based on conditional probability theory.

A Novel Module-Sign Low-Power Implementation for the DLMS Adaptive Filter With Low Steady-State Error

2021 ◽  
pp. 1-12
Author(s):  
Gennaro Di Meo ◽  
Davide De Caro ◽  
Gerardo Saggese ◽  
Ettore Napoli ◽  
Nicola Petra ◽  
...  
Keyword(s):  
Steady State ◽  
Low Power ◽  
Adaptive Filter ◽  
State Error

Low power area efficient adaptive FIR filter for hearing aids using distributed arithmetic architecture

2020 ◽  
Vol 23 (2) ◽  
pp. 287-296 ◽  
Author(s):  
P. V. Praveen Sundar ◽  
D. Ranjith ◽  
T. Karthikeyan ◽  
V. Vinoth Kumar ◽  
Balajee Jeyakumar
Keyword(s):  
Low Power ◽  
Hearing Aids ◽  
Fir Filter ◽  
Distributed Arithmetic ◽  
Adaptive Fir ◽  
Area Efficient

scholarly journals FPGA based least mean square algorithm for noise cancellation in communication system

2018 ◽  
Vol 7 (3.3) ◽  
pp. 165
Author(s):  
Praveen Reddy ◽  
Dr Baswaraj Gadgay
Keyword(s):  
Adaptive Filter ◽  
Communication System ◽  
Noise Cancellation ◽  
Mean Square ◽  
Least Mean Square ◽  
Distributed Arithmetic ◽  
Negative Effect ◽  
Least Mean Square Algorithm ◽  
Design Comparison

We present modified Distributed Arithmetic (DA) based architecture for LMS Adaptive filter which has improved the throughput of the filter also area and power has been comparatively been reduced. As we know, the adaptive filter uses continuous recalculation and generation of new coefficients will generate the negative effect on the use of algorithm. We have used a special temporary LUT addressing technique has overcome the issues resulting in better performance and good results. In this paper, we have discussed about the adaptive filter and implementation of DA adaptive filter and also discussed the results obtained from the design. Comparison with traditional de-sign has also been done to show the effectiveness of the algorithm.   

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